upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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118 lines
2.8 KiB
118 lines
2.8 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* Derived from linux/arch/mips/bcm63xx/gpio.c:
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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* Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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struct bcm6345_gpio_priv {
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void __iomem *reg_dirout;
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void __iomem *reg_data;
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};
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static int bcm6345_gpio_get_value(struct udevice *dev, unsigned offset)
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{
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struct bcm6345_gpio_priv *priv = dev_get_priv(dev);
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return !!(readl_be(priv->reg_data) & BIT(offset));
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}
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static int bcm6345_gpio_set_value(struct udevice *dev, unsigned offset,
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int value)
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{
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struct bcm6345_gpio_priv *priv = dev_get_priv(dev);
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if (value)
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setbits_be32(priv->reg_data, BIT(offset));
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else
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clrbits_be32(priv->reg_data, BIT(offset));
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return 0;
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}
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static int bcm6345_gpio_set_direction(void __iomem *dirout, unsigned offset,
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bool input)
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{
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if (input)
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clrbits_be32(dirout, BIT(offset));
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else
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setbits_be32(dirout, BIT(offset));
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return 0;
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}
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static int bcm6345_gpio_direction_input(struct udevice *dev, unsigned offset)
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{
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struct bcm6345_gpio_priv *priv = dev_get_priv(dev);
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return bcm6345_gpio_set_direction(priv->reg_dirout, offset, 1);
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}
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static int bcm6345_gpio_direction_output(struct udevice *dev, unsigned offset,
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int value)
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{
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struct bcm6345_gpio_priv *priv = dev_get_priv(dev);
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bcm6345_gpio_set_value(dev, offset, value);
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return bcm6345_gpio_set_direction(priv->reg_dirout, offset, 0);
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}
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static int bcm6345_gpio_get_function(struct udevice *dev, unsigned offset)
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{
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struct bcm6345_gpio_priv *priv = dev_get_priv(dev);
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if (readl_be(priv->reg_dirout) & BIT(offset))
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return GPIOF_OUTPUT;
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else
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return GPIOF_INPUT;
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}
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static const struct dm_gpio_ops bcm6345_gpio_ops = {
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.direction_input = bcm6345_gpio_direction_input,
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.direction_output = bcm6345_gpio_direction_output,
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.get_value = bcm6345_gpio_get_value,
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.set_value = bcm6345_gpio_set_value,
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.get_function = bcm6345_gpio_get_function,
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};
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static int bcm6345_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct bcm6345_gpio_priv *priv = dev_get_priv(dev);
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priv->reg_dirout = dev_remap_addr_index(dev, 0);
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if (!priv->reg_dirout)
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return -EINVAL;
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priv->reg_data = dev_remap_addr_index(dev, 1);
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if (!priv->reg_data)
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return -EINVAL;
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uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", 32);
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uc_priv->bank_name = dev->name;
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return 0;
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}
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static const struct udevice_id bcm6345_gpio_ids[] = {
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{ .compatible = "brcm,bcm6345-gpio" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(bcm6345_gpio) = {
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.name = "bcm6345-gpio",
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.id = UCLASS_GPIO,
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.of_match = bcm6345_gpio_ids,
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.ops = &bcm6345_gpio_ops,
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.priv_auto_alloc_size = sizeof(struct bcm6345_gpio_priv),
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.probe = bcm6345_gpio_probe,
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};
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