upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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223 lines
7.3 KiB
223 lines
7.3 KiB
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* Since we use the Inferno-Loader to bring us to live,
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* we skip the lowlevel init stuff.
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* But U-Boot still relocates itself into RAM
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*/
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#define CONFIG_INFERNO /* we are using the inferno bootldr */
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#define CONFIG_SKIP_LOWLEVEL_INIT 1
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_SA1100 1 /* This is an SA1100 CPU */
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#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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/* we will never enable dcache, because we have to setup MMU first */
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#define CONFIG_SYS_NO_DCACHE
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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/*
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* Hardware drivers
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*/
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#define CONFIG_DRIVER_3C589 1
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/*
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* select serial console configuration
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*/
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#define CONFIG_SA1100_SERIAL
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#define CONFIG_SERIAL3 1 /* we use SERIAL 3 */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
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#define CONFIG_NETMASK 255.255.0.0
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#define CONFIG_BOOTCOMMAND "help"
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "TuxScreen # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */
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#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
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#define CONFIG_SYS_CPUSPEED 0x09 /* 190 MHz for Shannon */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_DOS_PARTITION 1 /* DOS partitiion support */
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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/* BE CAREFUL */
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#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of EDORAM */
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#define PHYS_SDRAM_1 0xc0000000 /* RAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x00400000 /* 4 MB */
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#define PHYS_SDRAM_2 0xc8000000 /* RAM Bank #2 */
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#define PHYS_SDRAM_2_SIZE 0x00400000 /* 4 MB */
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#define PHYS_SDRAM_3 0xd0000000 /* RAM Bank #3 */
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#define PHYS_SDRAM_3_SIZE 0x00400000 /* 4 MB */
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#define PHYS_SDRAM_4 0xd8000000 /* RAM Bank #4 */
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#define PHYS_SDRAM_4_SIZE 0x00400000 /* 4 MB */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT (31+4) /* max number of sectors on one chip */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#ifdef CONFIG_INFERNO
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/* we take the last sector, 128 KB in size, but we only use 16 KB of it for stack reasons */
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */
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#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
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#define CONFIG_ENV_SECT_SIZE (128 << 10) /* size of environment sector */
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#else
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
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#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
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#endif
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/*-----------------------------------------------------------------------
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* PCMCIA stuff
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*-----------------------------------------------------------------------
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*
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*/
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/* we pick the upper one */
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#define CONFIG_PCMCIA_SLOT_A
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#define CONFIG_SYS_PCMCIA_IO_ADDR (0x20000000)
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#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 )
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#define CONFIG_SYS_PCMCIA_DMA_ADDR (0x24000000)
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#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 )
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#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0x2C000000)
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#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 )
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#define CONFIG_SYS_PCMCIA_MEM_ADDR (0x28000000)
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#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 )
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/* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */
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/*-----------------------------------------------------------------------
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* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
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*-----------------------------------------------------------------------
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*/
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#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */
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#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */
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#undef CONFIG_IDE_LED /* LED for ide not supported */
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#undef CONFIG_IDE_RESET /* reset for ide not supported */
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#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
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#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
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/* it's simple, all regs are in I/O space */
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#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_ATTRB_ADDR
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/* Offset for data I/O */
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#define CONFIG_SYS_ATA_DATA_OFFSET 0
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/* Offset for normal register accesses */
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#define CONFIG_SYS_ATA_REG_OFFSET 0
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/* Offset for alternate registers */
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#define CONFIG_SYS_ATA_ALT_OFFSET 0
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/*-----------------------------------------------------------------------
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*/
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#endif /* __CONFIG_H */
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