upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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241 lines
5.3 KiB
241 lines
5.3 KiB
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _COREBOOT_TABLES_H
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#define _COREBOOT_TABLES_H
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#include <compiler.h>
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struct cbuint64 {
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u32 lo;
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u32 hi;
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};
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struct cb_header {
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u8 signature[4];
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u32 header_bytes;
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u32 header_checksum;
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u32 table_bytes;
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u32 table_checksum;
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u32 table_entries;
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};
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struct cb_record {
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u32 tag;
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u32 size;
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};
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#define CB_TAG_UNUSED 0x0000
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#define CB_TAG_MEMORY 0x0001
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struct cb_memory_range {
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struct cbuint64 start;
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struct cbuint64 size;
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u32 type;
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};
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#define CB_MEM_RAM 1
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#define CB_MEM_RESERVED 2
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#define CB_MEM_ACPI 3
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#define CB_MEM_NVS 4
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#define CB_MEM_UNUSABLE 5
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#define CB_MEM_VENDOR_RSVD 6
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#define CB_MEM_TABLE 16
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struct cb_memory {
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u32 tag;
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u32 size;
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struct cb_memory_range map[0];
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};
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#define CB_TAG_HWRPB 0x0002
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struct cb_hwrpb {
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u32 tag;
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u32 size;
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u64 hwrpb;
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};
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#define CB_TAG_MAINBOARD 0x0003
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struct cb_mainboard {
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u32 tag;
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u32 size;
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u8 vendor_idx;
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u8 part_number_idx;
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u8 strings[0];
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};
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#define CB_TAG_VERSION 0x0004
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#define CB_TAG_EXTRA_VERSION 0x0005
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#define CB_TAG_BUILD 0x0006
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#define CB_TAG_COMPILE_TIME 0x0007
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#define CB_TAG_COMPILE_BY 0x0008
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#define CB_TAG_COMPILE_HOST 0x0009
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#define CB_TAG_COMPILE_DOMAIN 0x000a
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#define CB_TAG_COMPILER 0x000b
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#define CB_TAG_LINKER 0x000c
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#define CB_TAG_ASSEMBLER 0x000d
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struct cb_string {
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u32 tag;
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u32 size;
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u8 string[0];
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};
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#define CB_TAG_SERIAL 0x000f
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struct cb_serial {
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u32 tag;
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u32 size;
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#define CB_SERIAL_TYPE_IO_MAPPED 1
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#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
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u32 type;
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u32 baseaddr;
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u32 baud;
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};
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#define CB_TAG_CONSOLE 0x00010
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struct cb_console {
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u32 tag;
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u32 size;
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u16 type;
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};
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#define CB_TAG_CONSOLE_SERIAL8250 0
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#define CB_TAG_CONSOLE_VGA 1 /* OBSOLETE */
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#define CB_TAG_CONSOLE_BTEXT 2 /* OBSOLETE */
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#define CB_TAG_CONSOLE_LOGBUF 3
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#define CB_TAG_CONSOLE_SROM 4 /* OBSOLETE */
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#define CB_TAG_CONSOLE_EHCI 5
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#define CB_TAG_FORWARD 0x00011
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struct cb_forward {
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u32 tag;
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u32 size;
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u64 forward;
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};
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#define CB_TAG_FRAMEBUFFER 0x0012
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struct cb_framebuffer {
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u32 tag;
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u32 size;
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u64 physical_address;
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u32 x_resolution;
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u32 y_resolution;
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u32 bytes_per_line;
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u8 bits_per_pixel;
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u8 red_mask_pos;
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u8 red_mask_size;
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u8 green_mask_pos;
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u8 green_mask_size;
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u8 blue_mask_pos;
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u8 blue_mask_size;
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u8 reserved_mask_pos;
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u8 reserved_mask_size;
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};
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#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
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struct cb_cmos_option_table {
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u32 tag;
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u32 size;
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u32 header_length;
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};
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#define CB_TAG_OPTION 0x00c9
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#define CMOS_MAX_NAME_LENGTH 32
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struct cb_cmos_entries {
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u32 tag;
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u32 size;
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u32 bit;
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u32 length;
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u32 config;
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u32 config_id;
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u8 name[CMOS_MAX_NAME_LENGTH];
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};
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#define CB_TAG_OPTION_ENUM 0x00ca
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#define CMOS_MAX_TEXT_LENGTH 32
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struct cb_cmos_enums {
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u32 tag;
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u32 size;
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u32 config_id;
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u32 value;
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u8 text[CMOS_MAX_TEXT_LENGTH];
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};
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#define CB_TAG_OPTION_DEFAULTS 0x00cb
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#define CMOS_IMAGE_BUFFER_SIZE 128
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struct cb_cmos_defaults {
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u32 tag;
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u32 size;
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u32 name_length;
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u8 name[CMOS_MAX_NAME_LENGTH];
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u8 default_set[CMOS_IMAGE_BUFFER_SIZE];
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};
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#define CB_TAG_OPTION_CHECKSUM 0x00cc
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#define CHECKSUM_NONE 0
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#define CHECKSUM_PCBIOS 1
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struct cb_cmos_checksum {
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u32 tag;
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u32 size;
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u32 range_start;
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u32 range_end;
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u32 location;
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u32 type;
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};
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/* Helpful macros */
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#define MEM_RANGE_COUNT(_rec) \
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(((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
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#define MEM_RANGE_PTR(_rec, _idx) \
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(((u8 *) (_rec)) + sizeof(*(_rec)) \
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+ (sizeof((_rec)->map[0]) * (_idx)))
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#define MB_VENDOR_STRING(_mb) \
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(((unsigned char *) ((_mb)->strings)) + (_mb)->vendor_idx)
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#define MB_PART_STRING(_mb) \
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(((unsigned char *) ((_mb)->strings)) + (_mb)->part_number_idx)
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#define UNPACK_CB64(_in) \
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((((u64) _in.hi) << 32) | _in.lo)
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struct sysinfo_t;
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int get_coreboot_info(struct sysinfo_t *info);
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#endif
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