upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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45 lines
1.1 KiB
45 lines
1.1 KiB
/*
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* Copyright (C) 2012 Samsung Electronics
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* Lukasz Majewski <l.majewski@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MAX8997_MUIC_H_
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#define __MAX8997_MUIC_H_
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#include <power/power_chrg.h>
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/* MAX8997_MUIC_STATUS2 */
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#define MAX8997_MUIC_CHG_NO 0x00
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#define MAX8997_MUIC_CHG_USB 0x01
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#define MAX8997_MUIC_CHG_USB_D 0x02
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#define MAX8997_MUIC_CHG_TA 0x03
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#define MAX8997_MUIC_CHG_TA_500 0x04
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#define MAX8997_MUIC_CHG_TA_1A 0x05
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#define MAX8997_MUIC_CHG_MASK 0x07
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/* MAX 8997 MUIC registers */
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enum {
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MAX8997_MUIC_ID = 0x00,
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MAX8997_MUIC_INT1 = 0x01,
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MAX8997_MUIC_INT2 = 0x02,
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MAX8997_MUIC_INT3 = 0x03,
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MAX8997_MUIC_STATUS1 = 0x04,
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MAX8997_MUIC_STATUS2 = 0x05,
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MAX8997_MUIC_STATUS3 = 0x06,
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MAX8997_MUIC_INTMASK1 = 0x07,
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MAX8997_MUIC_INTMASK2 = 0x08,
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MAX8997_MUIC_INTMASK3 = 0x09,
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MAX8997_MUIC_CDETCTRL = 0x0A,
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MAX8997_MUIC_CONTROL1 = 0x0C,
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MAX8997_MUIC_CONTROL2 = 0x0D,
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MAX8997_MUIC_CONTROL3 = 0x0E,
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MUIC_NUM_OF_REGS = 0x0F,
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};
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#define MAX8997_MUIC_I2C_ADDR (0x4A >> 1)
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int power_muic_init(unsigned int bus);
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#endif /* __MAX8997_MUIC_H_ */
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