upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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334 lines
8.6 KiB
334 lines
8.6 KiB
/*
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* eSPI controller driver.
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* Author: Mingkai Hu (Mingkai.hu@freescale.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/immap_85xx.h>
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struct fsl_spi_slave {
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struct spi_slave slave;
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unsigned int div16;
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unsigned int pm;
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unsigned int mode;
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size_t cmd_len;
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u8 cmd_buf[16];
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size_t data_len;
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unsigned int max_transfer_length;
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};
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#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave)
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#define ESPI_MAX_CS_NUM 4
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#define ESPI_EV_RNE (1 << 9)
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#define ESPI_EV_TNF (1 << 8)
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#define ESPI_MODE_EN (1 << 31) /* Enable interface */
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#define ESPI_MODE_TXTHR(x) ((x) << 8) /* Tx FIFO threshold */
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#define ESPI_MODE_RXTHR(x) ((x) << 0) /* Rx FIFO threshold */
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#define ESPI_COM_CS(x) ((x) << 30)
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#define ESPI_COM_TRANLEN(x) ((x) << 0)
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#define ESPI_CSMODE_CI_INACTIVEHIGH (1 << 31)
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#define ESPI_CSMODE_CP_BEGIN_EDGCLK (1 << 30)
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#define ESPI_CSMODE_REV_MSB_FIRST (1 << 29)
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#define ESPI_CSMODE_DIV16 (1 << 28)
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#define ESPI_CSMODE_PM(x) ((x) << 24)
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#define ESPI_CSMODE_POL_ASSERTED_LOW (1 << 20)
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#define ESPI_CSMODE_LEN(x) ((x) << 16)
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#define ESPI_CSMODE_CSBEF(x) ((x) << 12)
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#define ESPI_CSMODE_CSAFT(x) ((x) << 8)
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#define ESPI_CSMODE_CSCG(x) ((x) << 3)
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#define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \
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ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \
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ESPI_CSMODE_CSCG(1))
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#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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struct fsl_spi_slave *fsl;
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sys_info_t sysinfo;
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unsigned long spibrg = 0;
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unsigned char pm = 0;
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if (!spi_cs_is_valid(bus, cs))
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return NULL;
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fsl = malloc(sizeof(struct fsl_spi_slave));
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if (!fsl)
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return NULL;
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fsl->slave.bus = bus;
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fsl->slave.cs = cs;
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fsl->mode = mode;
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fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
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/* Set eSPI BRG clock source */
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get_sys_info(&sysinfo);
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spibrg = sysinfo.freqSystemBus / 2;
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fsl->div16 = 0;
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if ((spibrg / max_hz) > 32) {
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fsl->div16 = ESPI_CSMODE_DIV16;
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pm = spibrg / (max_hz * 16 * 2);
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if (pm > 16) {
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pm = 16;
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debug("Requested speed is too low: %d Hz, "
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"%d Hz is used.\n", max_hz, spibrg / (32 * 16));
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}
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} else
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pm = spibrg / (max_hz * 2);
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if (pm)
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pm--;
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fsl->pm = pm;
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return &fsl->slave;
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
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free(fsl);
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}
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void spi_init(void)
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{
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
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ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
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unsigned char pm = fsl->pm;
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unsigned int cs = slave->cs;
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unsigned int mode = fsl->mode;
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unsigned int div16 = fsl->div16;
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int i;
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debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs);
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/* Enable eSPI interface */
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out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
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| ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
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out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
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out_be32(&espi->mask, 0x00000000); /* Mask all eSPI interrupts */
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/* Init CS mode interface */
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for (i = 0; i < ESPI_MAX_CS_NUM; i++)
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out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
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out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
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~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
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| ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
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| ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
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/* Set eSPI BRG clock source */
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out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
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| ESPI_CSMODE_PM(pm) | div16);
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/* Set eSPI mode */
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if (mode & SPI_CPHA)
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out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
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| ESPI_CSMODE_CP_BEGIN_EDGCLK);
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if (mode & SPI_CPOL)
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out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
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| ESPI_CSMODE_CI_INACTIVEHIGH);
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/* Character bit order: msb first */
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out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
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| ESPI_CSMODE_REV_MSB_FIRST);
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/* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
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out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
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| ESPI_CSMODE_LEN(7));
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
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void *data_in, unsigned long flags)
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{
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struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
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ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
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unsigned int tmpdout, tmpdin, event;
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const void *dout = NULL;
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void *din = NULL;
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int len = 0;
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int num_blks, num_chunks, max_tran_len, tran_len;
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int num_bytes;
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unsigned char *ch;
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unsigned char *buffer = NULL;
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size_t buf_len;
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u8 *cmd_buf = fsl->cmd_buf;
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size_t cmd_len = fsl->cmd_len;
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size_t data_len = bitlen / 8;
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size_t rx_offset = 0;
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max_tran_len = fsl->max_transfer_length;
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switch (flags) {
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case SPI_XFER_BEGIN:
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cmd_len = fsl->cmd_len = data_len;
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memcpy(cmd_buf, data_out, cmd_len);
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return 0;
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case 0:
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case SPI_XFER_END:
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if (bitlen == 0) {
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spi_cs_deactivate(slave);
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return 0;
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}
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buf_len = 2 * cmd_len + min(data_len, max_tran_len);
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len = cmd_len + data_len;
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rx_offset = cmd_len;
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buffer = (unsigned char *)malloc(buf_len);
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if (!buffer) {
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debug("SF: Failed to malloc memory.\n");
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return 1;
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}
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memcpy(buffer, cmd_buf, cmd_len);
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if (cmd_len != 1) {
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if (data_in == NULL)
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memcpy(buffer + cmd_len, data_out, data_len);
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}
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break;
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case SPI_XFER_BEGIN | SPI_XFER_END:
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len = data_len;
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buffer = (unsigned char *)malloc(len * 2);
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if (!buffer) {
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debug("SF: Failed to malloc memory.\n");
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return 1;
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}
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memcpy(buffer, data_out, len);
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rx_offset = len;
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cmd_len = 0;
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break;
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}
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debug("spi_xfer: slave %u:%u dout %08X(%08x) din %08X(%08x) len %u\n",
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slave->bus, slave->cs, *(uint *) dout,
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dout, *(uint *) din, din, len);
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num_chunks = data_len / max_tran_len +
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(data_len % max_tran_len ? 1 : 0);
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while (num_chunks--) {
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if (data_in)
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din = buffer + rx_offset;
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dout = buffer;
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tran_len = min(data_len , max_tran_len);
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num_blks = (tran_len + cmd_len) / 4 +
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((tran_len + cmd_len) % 4 ? 1 : 0);
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num_bytes = (tran_len + cmd_len) % 4;
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fsl->data_len = tran_len + cmd_len;
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spi_cs_activate(slave);
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/* Clear all eSPI events */
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out_be32(&espi->event , 0xffffffff);
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/* handle data in 32-bit chunks */
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while (num_blks--) {
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event = in_be32(&espi->event);
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if (event & ESPI_EV_TNF) {
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tmpdout = *(u32 *)dout;
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/* Set up the next iteration */
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if (len > 4) {
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len -= 4;
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dout += 4;
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}
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out_be32(&espi->tx, tmpdout);
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out_be32(&espi->event, ESPI_EV_TNF);
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debug("***spi_xfer:...%08x written\n", tmpdout);
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}
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/* Wait for eSPI transmit to get out */
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udelay(80);
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event = in_be32(&espi->event);
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if (event & ESPI_EV_RNE) {
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tmpdin = in_be32(&espi->rx);
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if (num_blks == 0 && num_bytes != 0) {
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ch = (unsigned char *)&tmpdin;
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while (num_bytes--)
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*(unsigned char *)din++ = *ch++;
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} else {
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*(u32 *) din = tmpdin;
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din += 4;
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}
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out_be32(&espi->event, in_be32(&espi->event)
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| ESPI_EV_RNE);
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debug("***spi_xfer:...%08x readed\n", tmpdin);
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}
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}
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if (data_in) {
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memcpy(data_in, buffer + 2 * cmd_len, tran_len);
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if (*buffer == 0x0b) {
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data_in += tran_len;
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data_len -= tran_len;
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*(int *)buffer += tran_len;
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}
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}
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spi_cs_deactivate(slave);
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}
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free(buffer);
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return 0;
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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return bus == 0 && cs < ESPI_MAX_CS_NUM;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
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ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
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unsigned int com = 0;
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size_t data_len = fsl->data_len;
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com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
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com |= ESPI_COM_CS(slave->cs);
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com |= ESPI_COM_TRANLEN(data_len - 1);
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out_be32(&espi->com, com);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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ccsr_espi_t *espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
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/* clear the RXCNT and TXCNT */
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out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
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out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
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}
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