upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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128 lines
3.2 KiB
128 lines
3.2 KiB
/*
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* PCI auto-configuration library
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*
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* Author: Matt Porter <mporter@mvista.com>
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*
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* Copyright 2000 MontaVista Software Inc.
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*
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* Modifications for driver model:
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* Copyright 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <pci.h>
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void pciauto_region_init(struct pci_region *res)
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{
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/*
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* Avoid allocating PCI resources from address 0 -- this is illegal
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* according to PCI 2.1 and moreover, this is known to cause Linux IDE
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* drivers to fail. Use a reasonable starting value of 0x1000 instead.
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*/
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res->bus_lower = res->bus_start ? res->bus_start : 0x1000;
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}
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void pciauto_region_align(struct pci_region *res, pci_size_t size)
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{
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res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1;
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}
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int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
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pci_addr_t *bar)
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{
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pci_addr_t addr;
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if (!res) {
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debug("No resource");
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goto error;
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}
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addr = ((res->bus_lower - 1) | (size - 1)) + 1;
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if (addr - res->bus_start + size > res->size) {
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debug("No room in resource");
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goto error;
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}
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res->bus_lower = addr + size;
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debug("address=0x%llx bus_lower=0x%llx", (unsigned long long)addr,
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(unsigned long long)res->bus_lower);
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*bar = addr;
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return 0;
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error:
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*bar = (pci_addr_t)-1;
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return -1;
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}
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void pciauto_config_init(struct pci_controller *hose)
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{
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int i;
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hose->pci_io = NULL;
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hose->pci_mem = NULL;
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hose->pci_prefetch = NULL;
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for (i = 0; i < hose->region_count; i++) {
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switch (hose->regions[i].flags) {
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case PCI_REGION_IO:
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if (!hose->pci_io ||
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hose->pci_io->size < hose->regions[i].size)
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hose->pci_io = hose->regions + i;
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break;
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case PCI_REGION_MEM:
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if (!hose->pci_mem ||
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hose->pci_mem->size < hose->regions[i].size)
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hose->pci_mem = hose->regions + i;
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break;
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case (PCI_REGION_MEM | PCI_REGION_PREFETCH):
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if (!hose->pci_prefetch ||
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hose->pci_prefetch->size < hose->regions[i].size)
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hose->pci_prefetch = hose->regions + i;
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break;
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}
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}
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if (hose->pci_mem) {
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pciauto_region_init(hose->pci_mem);
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debug("PCI Autoconfig: Bus Memory region: [0x%llx-0x%llx],\n"
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"\t\tPhysical Memory [%llx-%llxx]\n",
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(u64)hose->pci_mem->bus_start,
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(u64)(hose->pci_mem->bus_start + hose->pci_mem->size - 1),
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(u64)hose->pci_mem->phys_start,
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(u64)(hose->pci_mem->phys_start + hose->pci_mem->size - 1));
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}
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if (hose->pci_prefetch) {
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pciauto_region_init(hose->pci_prefetch);
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debug("PCI Autoconfig: Bus Prefetchable Mem: [0x%llx-0x%llx],\n"
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"\t\tPhysical Memory [%llx-%llx]\n",
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(u64)hose->pci_prefetch->bus_start,
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(u64)(hose->pci_prefetch->bus_start +
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hose->pci_prefetch->size - 1),
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(u64)hose->pci_prefetch->phys_start,
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(u64)(hose->pci_prefetch->phys_start +
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hose->pci_prefetch->size - 1));
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}
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if (hose->pci_io) {
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pciauto_region_init(hose->pci_io);
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debug("PCI Autoconfig: Bus I/O region: [0x%llx-0x%llx],\n"
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"\t\tPhysical Memory: [%llx-%llx]\n",
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(u64)hose->pci_io->bus_start,
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(u64)(hose->pci_io->bus_start + hose->pci_io->size - 1),
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(u64)hose->pci_io->phys_start,
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(u64)(hose->pci_io->phys_start + hose->pci_io->size - 1));
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}
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}
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