upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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130 lines
3.1 KiB
130 lines
3.1 KiB
/*
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* (C) Copyright 2009 Faraday Technology
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* Po-Yu Chuang <ratbert@faraday-tech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <div64.h>
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#include <asm/io.h>
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#include <faraday/ftpmu010.h>
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#include <faraday/fttmr010.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define TIMER_CLOCK 32768
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#define TIMER_LOAD_VAL 0xffffffff
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static inline unsigned long long tick_to_time(unsigned long long tick)
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{
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tick *= CONFIG_SYS_HZ;
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do_div(tick, gd->timer_rate_hz);
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return tick;
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}
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static inline unsigned long long usec_to_tick(unsigned long long usec)
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{
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usec *= gd->timer_rate_hz;
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do_div(usec, 1000000);
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return usec;
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}
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int timer_init(void)
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{
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struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
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unsigned int cr;
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debug("%s()\n", __func__);
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/* disable timers */
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writel(0, &tmr->cr);
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/* use 32768Hz oscillator for RTC, WDT, TIMER */
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ftpmu010_32768osc_enable();
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/* setup timer */
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writel(TIMER_LOAD_VAL, &tmr->timer3_load);
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writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
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writel(0, &tmr->timer3_match1);
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writel(0, &tmr->timer3_match2);
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/* we don't want timer to issue interrupts */
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writel(FTTMR010_TM3_MATCH1 |
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FTTMR010_TM3_MATCH2 |
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FTTMR010_TM3_OVERFLOW,
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&tmr->interrupt_mask);
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cr = readl(&tmr->cr);
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cr |= FTTMR010_TM3_CLOCK; /* use external clock */
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cr |= FTTMR010_TM3_ENABLE;
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writel(cr, &tmr->cr);
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gd->timer_rate_hz = TIMER_CLOCK;
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gd->tbu = gd->tbl = 0;
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return 0;
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}
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/*
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* Get the current 64 bit timer tick count
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*/
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unsigned long long get_ticks(void)
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{
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struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
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ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
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/* increment tbu if tbl has rolled over */
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if (now < gd->tbl)
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gd->tbu++;
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gd->tbl = now;
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return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
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}
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void __udelay(unsigned long usec)
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{
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unsigned long long start;
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ulong tmo;
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start = get_ticks(); /* get current timestamp */
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tmo = usec_to_tick(usec); /* convert usecs to ticks */
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while ((get_ticks() - start) < tmo)
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; /* loop till time has passed */
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}
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/*
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* get_timer(base) can be used to check for timeouts or
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* to measure elasped time relative to an event:
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*
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* ulong start_time = get_timer(0) sets start_time to the current
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* time value.
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* get_timer(start_time) returns the time elapsed since then.
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*
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* The time is used in CONFIG_SYS_HZ units!
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*/
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ulong get_timer(ulong base)
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{
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return tick_to_time(get_ticks()) - base;
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}
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/*
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* Return the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return gd->timer_rate_hz;
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}
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