upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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52 lines
1.7 KiB
52 lines
1.7 KiB
/*
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* RNG Memory Map
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*
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* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __RNG_H__
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#define __RNG_H__
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/* Random Number Generator */
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typedef struct rng_ctrl {
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u32 cr; /* 0x00 Control */
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u32 sr; /* 0x04 Status */
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u32 er; /* 0x08 Entropy */
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u32 out; /* 0x0C Output FIFO */
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} rng_t;
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#define RNG_CR_SLM (0x00000010) /* Sleep mode - 5445x */
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#define RNG_CR_CI (0x00000008) /* Clear interrupt */
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#define RNG_CR_IM (0x00000004) /* Interrupt mask */
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#define RNG_CR_HA (0x00000002) /* High assurance */
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#define RNG_CR_GO (0x00000001) /* Go bit */
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#define RNG_SR_OFS(x) (((x) & 0x000000FF) << 16)
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#define RNG_SR_OFS_MASK (0xFF00FFFF)
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#define RNG_SR_OFL(x) (((x) & 0x000000FF) << 8)
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#define RNG_SR_OFL_MASK (0xFFFF00FF)
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#define RNG_SR_EI (0x00000008)
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#define RNG_SR_FUF (0x00000004)
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#define RNG_SR_LRS (0x00000002)
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#define RNG_SR_SV (0x00000001)
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#endif /* __RNG_H__ */
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