upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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102 lines
2.3 KiB
102 lines
2.3 KiB
/*
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* Copyright (C) 2013,2014 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <config.h>
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#include <linux/linkage.h>
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#include <asm/psci.h>
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.pushsection ._secure.text, "ax"
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.arch_extension sec
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.align 5
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.globl _psci_vectors
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_psci_vectors:
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b default_psci_vector @ reset
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b default_psci_vector @ undef
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b _smc_psci @ smc
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b default_psci_vector @ pabort
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b default_psci_vector @ dabort
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b default_psci_vector @ hyp
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b default_psci_vector @ irq
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b psci_fiq_enter @ fiq
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ENTRY(psci_fiq_enter)
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movs pc, lr
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ENDPROC(psci_fiq_enter)
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.weak psci_fiq_enter
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ENTRY(default_psci_vector)
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movs pc, lr
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ENDPROC(default_psci_vector)
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.weak default_psci_vector
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ENTRY(psci_cpu_suspend)
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ENTRY(psci_cpu_off)
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ENTRY(psci_cpu_on)
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ENTRY(psci_migrate)
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mov r0, #ARM_PSCI_RET_NI @ Return -1 (Not Implemented)
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mov pc, lr
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ENDPROC(psci_migrate)
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ENDPROC(psci_cpu_on)
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ENDPROC(psci_cpu_off)
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ENDPROC(psci_cpu_suspend)
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.weak psci_cpu_suspend
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.weak psci_cpu_off
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.weak psci_cpu_on
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.weak psci_migrate
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_psci_table:
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.word ARM_PSCI_FN_CPU_SUSPEND
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.word psci_cpu_suspend
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.word ARM_PSCI_FN_CPU_OFF
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.word psci_cpu_off
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.word ARM_PSCI_FN_CPU_ON
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.word psci_cpu_on
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.word ARM_PSCI_FN_MIGRATE
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.word psci_migrate
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.word 0
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.word 0
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_smc_psci:
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push {r4-r7,lr}
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@ Switch to secure
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mrc p15, 0, r7, c1, c1, 0
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bic r4, r7, #1
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mcr p15, 0, r4, c1, c1, 0
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isb
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adr r4, _psci_table
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1: ldr r5, [r4] @ Load PSCI function ID
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ldr r6, [r4, #4] @ Load target PC
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cmp r5, #0 @ If reach the end, bail out
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moveq r0, #ARM_PSCI_RET_INVAL @ Return -2 (Invalid)
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beq 2f
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cmp r0, r5 @ If not matching, try next entry
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addne r4, r4, #8
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bne 1b
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blx r6 @ Execute PSCI function
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@ Switch back to non-secure
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2: mcr p15, 0, r7, c1, c1, 0
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pop {r4-r7, lr}
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movs pc, lr @ Return to the kernel
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.popsection
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