upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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95 lines
2.0 KiB
95 lines
2.0 KiB
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <errno.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#ifndef CONFIG_DM_PMIC_PFUZE100
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int pfuze_mode_init(struct pmic *p, u32 mode)
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{
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unsigned char offset, i, switch_num;
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u32 id;
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int ret;
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pmic_reg_read(p, PFUZE100_DEVICEID, &id);
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id = id & 0xf;
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if (id == 0) {
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switch_num = 6;
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offset = PFUZE100_SW1CMODE;
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} else if (id == 1) {
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switch_num = 4;
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offset = PFUZE100_SW2MODE;
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} else {
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printf("Not supported, id=%d\n", id);
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return -EINVAL;
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}
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ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
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if (ret < 0) {
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printf("Set SW1AB mode error!\n");
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return ret;
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}
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for (i = 0; i < switch_num - 1; i++) {
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ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
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if (ret < 0) {
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printf("Set switch 0x%x mode error!\n",
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offset + i * SWITCH_SIZE);
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return ret;
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}
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}
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return ret;
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}
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struct pmic *pfuze_common_init(unsigned char i2cbus)
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{
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struct pmic *p;
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int ret;
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unsigned int reg;
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ret = power_pfuze100_init(i2cbus);
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if (ret)
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return NULL;
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p = pmic_get("PFUZE100");
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ret = pmic_probe(p);
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if (ret)
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return NULL;
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pmic_reg_read(p, PFUZE100_DEVICEID, ®);
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printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
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/* Set SW1AB stanby volage to 0.975V */
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pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
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reg &= ~SW1x_STBY_MASK;
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reg |= SW1x_0_975V;
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pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
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/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE100_SW1ABCONF, ®);
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reg &= ~SW1xCONF_DVSSPEED_MASK;
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reg |= SW1xCONF_DVSSPEED_4US;
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pmic_reg_write(p, PFUZE100_SW1ABCONF, reg);
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/* Set SW1C standby voltage to 0.975V */
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pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
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reg &= ~SW1x_STBY_MASK;
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reg |= SW1x_0_975V;
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pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
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/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
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reg &= ~SW1xCONF_DVSSPEED_MASK;
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reg |= SW1xCONF_DVSSPEED_4US;
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pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
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return p;
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}
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#endif
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