upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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192 lines
5.4 KiB
192 lines
5.4 KiB
/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
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* Hyungwon Hwang <human.hwang@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/mipi_dsim.h>
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#define SCAN_FROM_LEFT_TO_RIGHT 0
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#define SCAN_FROM_RIGHT_TO_LEFT 1
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#define SCAN_FROM_TOP_TO_BOTTOM 0
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#define SCAN_FROM_BOTTOM_TO_TOP 1
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static void l5f31188_sleep_in(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x10, 0x00);
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}
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static void l5f31188_sleep_out(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
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}
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static void l5f31188_set_gamma(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x26, 0x00);
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}
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static void l5f31188_display_off(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x28, 0x00);
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}
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static void l5f31188_display_on(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
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}
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static void l5f31188_ctl_memory_access(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops,
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int h_direction, int v_direction)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x36,
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(((h_direction & 0x1) << 1) | (v_direction & 0x1)));
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}
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static void l5f31188_set_pixel_format(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x3A, 0x70);
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}
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static void l5f31188_write_disbv(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops, unsigned int brightness)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x51, brightness);
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}
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static void l5f31188_write_ctrld(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x53, 0x2C);
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}
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static void l5f31188_write_cabc(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops,
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unsigned int wm_mode)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x55, wm_mode);
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}
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static void l5f31188_write_cabcmb(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops, unsigned int min_brightness)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x5E,
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min_brightness);
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}
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static void l5f31188_set_extension(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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const unsigned char data_to_send[] = {
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0xB9, 0xFF, 0x83, 0x94
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};
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ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
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(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void l5f31188_set_dgc_lut(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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const unsigned char data_to_send[] = {
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0xC1, 0x01, 0x00, 0x04, 0x0E, 0x18, 0x1E, 0x26,
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0x2F, 0x36, 0x3E, 0x47, 0x4E, 0x56, 0x5D, 0x65,
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0x6D, 0x75, 0x7D, 0x84, 0x8C, 0x94, 0x9C, 0xA4,
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0xAD, 0xB5, 0xBD, 0xC5, 0xCC, 0xD4, 0xDE, 0xE5,
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0xEE, 0xF7, 0xFF, 0x3F, 0x9A, 0xCE, 0xD4, 0x21,
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0xA1, 0x26, 0x54, 0x00, 0x00, 0x04, 0x0E, 0x19,
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0x1F, 0x27, 0x30, 0x37, 0x40, 0x48, 0x50, 0x58,
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0x60, 0x67, 0x6F, 0x77, 0x7F, 0x87, 0x8F, 0x97,
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0x9F, 0xA7, 0xB0, 0xB8, 0xC0, 0xC8, 0xCE, 0xD8,
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0xE0, 0xE7, 0xF0, 0xF7, 0xFF, 0x3C, 0xEB, 0xFD,
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0x2F, 0x66, 0xA8, 0x2C, 0x46, 0x00, 0x00, 0x04,
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0x0E, 0x18, 0x1E, 0x26, 0x30, 0x38, 0x41, 0x4A,
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0x52, 0x5A, 0x62, 0x6B, 0x73, 0x7B, 0x83, 0x8C,
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0x94, 0x9C, 0xA5, 0xAD, 0xB6, 0xBD, 0xC5, 0xCC,
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0xD4, 0xDD, 0xE3, 0xEB, 0xF2, 0xF9, 0xFF, 0x3F,
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0xA4, 0x8A, 0x8F, 0xC7, 0x33, 0xF5, 0xE9, 0x00
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};
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ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
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(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void l5f31188_set_tcon(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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const unsigned char data_to_send[] = {
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0xC7, 0x00, 0x20
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};
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ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
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(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void l5f31188_set_ptba(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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const unsigned char data_to_send[] = {
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0xBF, 0x06, 0x10
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};
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ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
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(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void l5f31188_set_eco(struct mipi_dsim_device *dev,
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struct mipi_dsim_master_ops *ops)
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{
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ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xC6, 0x0C);
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}
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static int l5f31188_panel_init(struct mipi_dsim_device *dev)
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{
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struct mipi_dsim_master_ops *ops = dev->master_ops;
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l5f31188_set_extension(dev, ops);
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l5f31188_set_dgc_lut(dev, ops);
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l5f31188_set_eco(dev, ops);
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l5f31188_set_tcon(dev, ops);
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l5f31188_set_ptba(dev, ops);
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l5f31188_set_gamma(dev, ops);
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l5f31188_ctl_memory_access(dev, ops,
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SCAN_FROM_LEFT_TO_RIGHT, SCAN_FROM_TOP_TO_BOTTOM);
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l5f31188_set_pixel_format(dev, ops);
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l5f31188_write_disbv(dev, ops, 0xFF);
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l5f31188_write_ctrld(dev, ops);
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l5f31188_write_cabc(dev, ops, 0x0);
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l5f31188_write_cabcmb(dev, ops, 0x0);
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l5f31188_sleep_out(dev, ops);
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/* 120 msec */
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udelay(120 * 1000);
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return 0;
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}
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static void l5f31188_display_enable(struct mipi_dsim_device *dev)
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{
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struct mipi_dsim_master_ops *ops = dev->master_ops;
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l5f31188_display_on(dev, ops);
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}
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static struct mipi_dsim_lcd_driver l5f31188_dsim_ddi_driver = {
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.name = "l5f31188",
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.id = -1,
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.mipi_panel_init = l5f31188_panel_init,
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.mipi_display_on = l5f31188_display_enable,
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};
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void l5f31188_init(void)
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{
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exynos_mipi_dsi_register_lcd_driver(&l5f31188_dsim_ddi_driver);
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}
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