upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
27 lines
945 B
27 lines
945 B
#ifndef __BOARD_CPU86__
|
|
#define __BOARD_CPU86__
|
|
|
|
#include <config.h>
|
|
|
|
#define REG8(x) (*(volatile unsigned char *)(x))
|
|
|
|
/* CPU86 register definitions */
|
|
#define CPU86_VME_EAC REG8(CFG_BCRS_BASE + 0x00)
|
|
#define CPU86_VME_SAC REG8(CFG_BCRS_BASE + 0x01)
|
|
#define CPU86_VME_MAC REG8(CFG_BCRS_BASE + 0x02)
|
|
#define CPU86_BCR REG8(CFG_BCRS_BASE + 0x03)
|
|
#define CPU86_BSR REG8(CFG_BCRS_BASE + 0x04)
|
|
#define CPU86_WDOG_RPORT REG8(CFG_BCRS_BASE + 0x05)
|
|
#define CPU86_MBOX_IRQ REG8(CFG_BCRS_BASE + 0x04)
|
|
#define CPU86_REV REG8(CFG_BCRS_BASE + 0x07)
|
|
#define CPU86_VME_IRQMASK REG8(CFG_BCRS_BASE + 0x80)
|
|
#define CPU86_VME_IRQSTATUS REG8(CFG_BCRS_BASE + 0x81)
|
|
#define CPU86_LOCAL_IRQMASK REG8(CFG_BCRS_BASE + 0x82)
|
|
#define CPU86_LOCAL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x83)
|
|
#define CPU86_PMCL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x84)
|
|
|
|
/* Board Control Register bits */
|
|
#define CPU86_BCR_FWPT 0x01
|
|
#define CPU86_BCR_FWRE 0x02
|
|
|
|
#endif /* __BOARD_CPU86__ */
|
|
|