upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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319 lines
12 KiB
319 lines
12 KiB
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8xx.h>
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#include <asm/8xx_immap.h>
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#include "ioport.h"
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#if 0
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#define IOPORT_DEBUG
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#endif
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#ifdef IOPORT_DEBUG
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#define PRINTF(fmt,args...) printf (fmt ,##args)
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#else
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#define PRINTF(fmt,args...)
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#endif
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/*
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* The ioport configuration table.
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*/
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const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
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/*
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* Port A configuration
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* Pin Signal Type Active Initial state
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* PA7 fpgaProgramLowOut Out Low High
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* PA1 fpgaCoreVoltageFailLow In Low N/A
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*/
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{ /* conf ppar psor pdir podr pdat pint function */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
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/* PA15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA9 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 1*/
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/* PA8 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 1*/
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/* PA7 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaProgramLow */
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/* PA6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA5 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 0*/
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/* PA4 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 0*/
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/* PA3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PA2 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#if !defined(CONFIG_SC)
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/* PA1 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaCoreVoltageFail*/
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#else
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/* PA1 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#endif
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/* PA0 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
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},
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/*
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* Port B configuration
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* Pin Signal Type Active Initial state
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* PB14 docBusyLowIn In Low X
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* PB15 gpio1Sig Out High Low
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* PB16 fpgaDoneBi In High X
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* PB17 swBitOkLowOut Out Low High
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* PB19 speakerVolSig Out/Hi-Z High/Low High (Hi-Z)
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* PB22 fpgaInitLowBi In Low X
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* PB23 batteryOkSig In High X
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* PB31 pulseCatcherClr Out High 0
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*/
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{ /* conf ppar psor pdir podr pdat pint function */
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#if !defined(CONFIG_SC)
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/* PB31 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#else
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/* PB31 */ { 1, 0, 0, 1, 0, 0, 0 }, /* pulseCatcherClr */
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#endif
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/* PB30 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB29 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB28 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB27 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB26 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB25 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB24 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#if !defined(CONFIG_SC)
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/* PB23 */ { 1, 0, 0, 0, 0, 0, 0 }, /* batteryOk */
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#else
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/* PB23 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#endif
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/* PB22 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaInitLowBi */
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/* PB21 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB20 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#if !defined(CONFIG_SC)
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/* PB19 */ { 1, 0, 0, 1, 1, 1, 0 }, /* speakerVol */
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#else
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/* PB19 */ { 0, 0, 0, 1, 1, 1, 0 }, /* */
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#endif
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/* PB18 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PB17 */ { 1, 0, 0, 1, 0, 1, 0 }, /* swBitOkLow */
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/* PB16 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaDone */
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/* PB15 */ { 1, 0, 0, 1, 0, 0, 0 }, /* gpio1 */
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#if !defined(CONFIG_SC)
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/* PB14 */ { 1, 0, 0, 0, 0, 0, 0 } /* docBusyLow */
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#else
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/* PB14 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
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#endif
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},
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/*
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* Port C configuration
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* Pin Signal Type Active Initial state
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* PC4 i2cBus1EnSig Out High High
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* PC5 i2cBus2EnSig Out High High
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* PC6 gpio0Sig Out High Low
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* PC8 i2cBus3EnSig Out High High
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* PC10 i2cBus4EnSig Out High High
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* PC11 fpgaResetLowOut Out Low High
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* PC12 systemBitOkIn In High X
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* PC15 selfDreqLow In Low X
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*/
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{ /* conf ppar psor pdir podr pdat pint function */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PC15 */ { 1, 0, 0, 0, 0, 0, 0 }, /* selfDreqLowIn */
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/* PC14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PC13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#if !defined(CONFIG_SC)
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/* PC12 */ { 1, 0, 0, 0, 0, 0, 0 }, /* systemBitOkIn */
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#else
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/* PC12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#endif
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/* PC11 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaResetLowOut */
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#if !defined(CONFIG_SC)
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/* PC10 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus4EnSig */
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#else
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/* PC10 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
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#endif
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/* PC9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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#if !defined(CONFIG_SC)
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/* PC8 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus3EnSig */
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#else
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/* PC8 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
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#endif
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/* PC7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PC6 */ { 1, 0, 0, 1, 0, 1, 0 }, /* gpio0 */
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#if !defined(CONFIG_SC)
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/* PC5 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus2EnSig */
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/* PC4 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus1EnSig */
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#else
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/* PC5 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
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/* PC4 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
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#endif
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
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},
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/*
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* Port D configuration
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*/
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{ /* conf ppar psor pdir podr pdat pint function */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD8 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD5 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD4 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* PD3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
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/* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
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}
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};
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/*
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* Configure the MPC8XX I/O ports per the ioport configuration table
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* (taken from ./cpu/mpc8260/cpu_init.c)
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*/
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void
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config_mpc8xx_ioports(volatile immap_t *immr)
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{
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int portnum;
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for (portnum = 0; portnum < NUM_PORTS; portnum++) {
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uint pmsk = 0, ppar = 0, psor = 0, pdir = 0;
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uint podr = 0, pdat = 0, pint = 0;
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uint msk = 1;
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mpc8xx_iop_conf_t *iopc = (mpc8xx_iop_conf_t *)&iop_conf_tab[portnum][0];
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mpc8xx_iop_conf_t *eiopc = iopc + PORT_BITS;
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/*
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* For all ports except port B, ignore the two don't care entries
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* in the configuration tables.
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*/
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if (portnum != 1) {
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iopc = (mpc8xx_iop_conf_t *)&iop_conf_tab[portnum][2];
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}
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/*
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* NOTE: index 0 refers to pin 17, index 17 refers to pin 0
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*/
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while (iopc < eiopc) {
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if (iopc->conf) {
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pmsk |= msk;
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if (iopc->ppar) ppar |= msk;
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if (iopc->psor) psor |= msk;
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if (iopc->pdir) pdir |= msk;
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if (iopc->podr) podr |= msk;
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if (iopc->pdat) pdat |= msk;
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if (iopc->pint) pint |= msk;
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}
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msk <<= 1;
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iopc++;
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}
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PRINTF("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__, portnum);
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#ifdef IOPORT_DEBUG
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switch(portnum) {
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case 0: printf("(A)\n"); break;
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case 1: printf("(B)\n"); break;
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case 2: printf("(C)\n"); break;
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case 3: printf("(D)\n"); break;
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default: printf("(?)\n"); break;
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}
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#endif
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PRINTF(" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n"
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" pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n",
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ppar, pdir, podr, pdat, psor, pint, pmsk);
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/*
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* Have to handle the ioports on a port-by-port basis since there
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* are three different flavors.
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*/
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if (pmsk != 0) {
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uint tpmsk = ~pmsk;
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if (0 == portnum) { /* port A */
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immr->im_ioport.iop_papar &= tpmsk;
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immr->im_ioport.iop_padat =
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(immr->im_ioport.iop_padat & tpmsk) | pdat;
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immr->im_ioport.iop_padir =
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(immr->im_ioport.iop_padir & tpmsk) | pdir;
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immr->im_ioport.iop_paodr =
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(immr->im_ioport.iop_paodr & tpmsk) | podr;
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immr->im_ioport.iop_papar |= ppar;
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}
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else if (1 == portnum) { /* port B */
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immr->im_cpm.cp_pbpar &= tpmsk;
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immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & tpmsk) | pdat;
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immr->im_cpm.cp_pbdir = (immr->im_cpm.cp_pbdir & tpmsk) | pdir;
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immr->im_cpm.cp_pbodr = (immr->im_cpm.cp_pbodr & tpmsk) | podr;
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immr->im_cpm.cp_pbpar |= ppar;
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}
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else if (2 == portnum) { /* port C */
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immr->im_ioport.iop_pcpar &= tpmsk;
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immr->im_ioport.iop_pcdat =
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(immr->im_ioport.iop_pcdat & tpmsk) | pdat;
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immr->im_ioport.iop_pcdir =
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(immr->im_ioport.iop_pcdir & tpmsk) | pdir;
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immr->im_ioport.iop_pcint =
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(immr->im_ioport.iop_pcint & tpmsk) | pint;
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immr->im_ioport.iop_pcso =
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(immr->im_ioport.iop_pcso & tpmsk) | psor;
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immr->im_ioport.iop_pcpar |= ppar;
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}
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else if (3 == portnum) { /* port D */
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immr->im_ioport.iop_pdpar &= tpmsk;
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immr->im_ioport.iop_pddat =
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(immr->im_ioport.iop_pddat & tpmsk) | pdat;
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immr->im_ioport.iop_pddir =
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(immr->im_ioport.iop_pddir & tpmsk) | pdir;
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immr->im_ioport.iop_pdpar |= ppar;
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}
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}
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}
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PRINTF("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x"
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" paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__,
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immr->im_ioport.iop_papar, immr->im_ioport.iop_padir,
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immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat);
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PRINTF("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x"
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" pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__,
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immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir,
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immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat);
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PRINTF("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x"
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" pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ",
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__FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar,
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immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat,
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immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint);
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PRINTF("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x"
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" pddat=0x%.4x\n", __FUNCTION__, __LINE__,
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immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir,
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immr->im_ioport.iop_pddat);
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}
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/* vim: set ts=4 sw=4 tw=78: */
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