upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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80 lines
1.5 KiB
80 lines
1.5 KiB
/*
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* Copyright 2014-2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <fsl_ifc.h>
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#include <i2c.h>
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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#ifdef CONFIG_SPL_MMC_SUPPORT
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return BOOT_DEVICE_MMC1;
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#endif
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#ifdef CONFIG_SPL_NAND_SUPPORT
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return BOOT_DEVICE_NAND;
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#endif
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return 0;
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}
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u32 spl_boot_mode(const u32 boot_device)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_MMC1:
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#ifdef CONFIG_SPL_FAT_SUPPORT
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return MMCSD_MODE_FS;
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#else
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return MMCSD_MODE_RAW;
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#endif
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case BOOT_DEVICE_NAND:
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return 0;
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default:
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puts("spl: error: unsupported device\n");
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hang();
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}
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}
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#ifdef CONFIG_SPL_BUILD
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void spl_board_init(void)
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{
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#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_LSCH2)
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/*
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* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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* SMMU must be reset in bypass mode.
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* Set the ClientPD bit and Clear the USFCFG Bit
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*/
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u32 val;
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val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
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out_le32(SMMU_SCR0, val);
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val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
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out_le32(SMMU_NSCR0, val);
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#endif
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}
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void board_init_f(ulong dummy)
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{
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/* Clear global data */
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memset((void *)gd, 0, sizeof(gd_t));
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board_early_init_f();
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timer_init();
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#ifdef CONFIG_ARCH_LS2080A
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env_init();
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#endif
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get_clocks();
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preloader_console_init();
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#ifdef CONFIG_SPL_I2C_SUPPORT
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i2c_init_all();
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#endif
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dram_init();
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}
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#endif
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