upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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35 lines
1.0 KiB
35 lines
1.0 KiB
/*
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* Copyright (C) 2015 Atmel Corporation
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* Wenyou Yang <wenyou.yang@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/sama5_matrix.h>
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void matrix_init(void)
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{
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struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
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struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
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int i;
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/* DDR port 1 ~ port 7 */
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for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) {
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writel(0x000f0f0f, &h64mx->ssr[i]);
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writel(0x0000ffff, &h64mx->sassr[i]);
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writel(0x0000000f, &h64mx->srtsr[i]);
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}
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/* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */
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writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]);
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writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]);
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writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
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/* NFC SRAM */
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writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]);
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writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]);
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writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]);
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}
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