upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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maxims@google.com d5ce357461 aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation ... Fix H-PLL and M-PLL rate calculation in ast2500 clock driver. Without this fix, valid setting can lead to division by zero when requesting the rate of H-PLL or M-PLL clocks. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>		7 years ago
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aspeed	aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation	7 years ago
at91	clk: at91: Improve the clock implementation	8 years ago
exynos	…
rockchip	rockchip: clk: Support setting ACLK	8 years ago
tegra	clock: implement a driver for the Tegra CAR	8 years ago
uniphier	clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clock	7 years ago
Kconfig	clk: zynqmp: Add clock driver support for zynqmp	7 years ago
Makefile	aspeed: Add basic ast2500-specific drivers and configuration	7 years ago
clk-uclass.c	clk: clk-uclass: Assign clk->dev before call .of_xlate	8 years ago
clk_boston.c	clk: boston: Providea simple driver for Boston board clocks	8 years ago
clk_fixed_rate.c	dm: clk: Add support for of-platdata	8 years ago
clk_pic32.c	…
clk_sandbox.c	clk: sandbox: don't check clk ID against 0	8 years ago
clk_sandbox_test.c	…
clk_zynqmp.c	clk: zynqmp: Add clock driver support for zynqmp	7 years ago