upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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158 lines
4.8 KiB
158 lines
4.8 KiB
/*
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* Copyright (C) 2010-2017 CS Systemes d'Information
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* Christophe Leroy <christophe.leroy@c-s.fr>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"sdram_type=SDRAM\0" \
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"flash_type=AM29LV160DB\0" \
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"loadaddr=0x400000\0" \
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"filename=uImage.lzma\0" \
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"nfsroot=/opt/ofs\0" \
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"dhcp_ip=ip=:::::eth0:dhcp\0" \
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"console_args=console=ttyCPM0,115200N8\0" \
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"flashboot=setenv bootargs " \
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"${console_args} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"mcr3k:eth0:off;" \
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"${ofl_args}; " \
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"bootm 0x04060000 - 0x04050000\0" \
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"tftpboot=setenv bootargs " \
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"${console_args} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"mcr3k:eth0:off " \
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"${ofl_args}; " \
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"tftp ${loadaddr} ${filename};" \
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"tftp 0xf00000 mcr3000.dtb;" \
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"bootm ${loadaddr} - 0xf00000\0" \
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"netboot=dhcp ${loadaddr} ${filename};" \
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"tftp 0xf00000 mcr3000.dtb;" \
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"setenv bootargs " \
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"root=/dev/nfs rw " \
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"${console_args} " \
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"${dhcp_ip};" \
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"bootm ${loadaddr} - 0xf00000\0" \
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"nfsboot=setenv bootargs " \
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"root=/dev/nfs rw nfsroot=${serverip}:${nfsroot} " \
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"${console_args} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"mcr3k:eth0:off;" \
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"bootm 0x04060000 - 0x04050000\0" \
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"dhcpboot=dhcp ${loadaddr} ${filename};" \
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"tftp 0xf00000 mcr3000.dtb;" \
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"setenv bootargs " \
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"${console_args} " \
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"${dhcp_ip} " \
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"${ofl_args}; " \
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"bootm ${loadaddr} - 0xf00000\0"
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_IPADDR 192.168.0.3
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#define CONFIG_SERVERIP 192.168.0.1
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#define CONFIG_NETMASK 255.0.0.0
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#define CONFIG_BOOTCOMMAND "run flashboot"
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#define CONFIG_BOOTARGS "ubi.mtd=4 root=ubi0:rootfs rw " \
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"rootfstype=ubifs rootflags=sync " \
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"console=ttyCPM0,115200N8 " \
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"ip=${ipaddr}:::${netmask}:mcr3k:eth0:off"
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#undef CONFIG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
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#define CONFIG_WATCHDOG 1 /* watchdog enabled */
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_CMDLINE_EDITING 1
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#ifdef CONFIG_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "S3K> "
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#endif
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#define CONFIG_SYS_MEMTEST_START 0x00002000
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#define CONFIG_SYS_MEMTEST_END 0x00800000
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#define CONFIG_SYS_LOAD_ADDR 0x200000
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#define CONFIG_SYS_HZ 1000
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/* Definitions for initial stack pointer and data area (in DPRAM) */
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
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#define CONFIG_SYS_INIT_RAM_SIZE 0x2f00
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#define CONFIG_SYS_GBL_DATA_SIZE 64
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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CONFIG_SYS_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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/* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define SDRAM_MAX_SIZE (32 * 1024 * 1024)
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/* FLASH organization */
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#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_FLASH_CFI 1
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 35
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
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#define CONFIG_SYS_MONITOR_LEN (256 << 10)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_MALLOC_LEN (4096 << 10)
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/* Environment Configuration */
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/* environment is in FLASH */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
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#define CONFIG_ENV_OVERWRITE 1
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/* Cache Configuration */
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#define CONFIG_SYS_CACHELINE_SIZE 16
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/* Ethernet configuration part */
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#define CONFIG_SYS_DISCOVER_PHY 1
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#ifdef CONFIG_MPC8XX_FEC
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#define CONFIG_MII_INIT 1
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#endif
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/* NAND configuration part */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_SYS_NAND_BASE 0x0C000000
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/* Internal Definitions */
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/* Boot Flags*/
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#define BOOTFLAG_COLD 0x01
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#define BOOTFLAG_WARM 0x02
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/* Misc Settings */
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#define CONFIG_CMD_REGINFO
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#endif /* __CONFIG_H */
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