upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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314 lines
8.8 KiB
314 lines
8.8 KiB
/*
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* Register definitions for the Atmel USART3 module.
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*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __DRIVERS_ATMEL_USART_H__
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#define __DRIVERS_ATMEL_USART_H__
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/* USART3 register offsets */
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#define USART3_CR 0x0000
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#define USART3_MR 0x0004
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#define USART3_IER 0x0008
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#define USART3_IDR 0x000c
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#define USART3_IMR 0x0010
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#define USART3_CSR 0x0014
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#define USART3_RHR 0x0018
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#define USART3_THR 0x001c
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#define USART3_BRGR 0x0020
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#define USART3_RTOR 0x0024
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#define USART3_TTGR 0x0028
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#define USART3_FIDI 0x0040
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#define USART3_NER 0x0044
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#define USART3_XXR 0x0048
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#define USART3_IFR 0x004c
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#define USART3_RPR 0x0100
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#define USART3_RCR 0x0104
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#define USART3_TPR 0x0108
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#define USART3_TCR 0x010c
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#define USART3_RNPR 0x0110
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#define USART3_RNCR 0x0114
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#define USART3_TNPR 0x0118
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#define USART3_TNCR 0x011c
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#define USART3_PTCR 0x0120
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#define USART3_PTSR 0x0124
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/* Bitfields in CR */
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#define USART3_RSTRX_OFFSET 2
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#define USART3_RSTRX_SIZE 1
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#define USART3_RSTTX_OFFSET 3
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#define USART3_RSTTX_SIZE 1
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#define USART3_RXEN_OFFSET 4
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#define USART3_RXEN_SIZE 1
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#define USART3_RXDIS_OFFSET 5
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#define USART3_RXDIS_SIZE 1
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#define USART3_TXEN_OFFSET 6
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#define USART3_TXEN_SIZE 1
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#define USART3_TXDIS_OFFSET 7
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#define USART3_TXDIS_SIZE 1
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#define USART3_RSTSTA_OFFSET 8
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#define USART3_RSTSTA_SIZE 1
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#define USART3_STTBRK_OFFSET 9
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#define USART3_STTBRK_SIZE 1
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#define USART3_STPBRK_OFFSET 10
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#define USART3_STPBRK_SIZE 1
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#define USART3_STTTO_OFFSET 11
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#define USART3_STTTO_SIZE 1
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#define USART3_SENDA_OFFSET 12
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#define USART3_SENDA_SIZE 1
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#define USART3_RSTIT_OFFSET 13
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#define USART3_RSTIT_SIZE 1
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#define USART3_RSTNACK_OFFSET 14
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#define USART3_RSTNACK_SIZE 1
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#define USART3_RETTO_OFFSET 15
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#define USART3_RETTO_SIZE 1
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#define USART3_DTREN_OFFSET 16
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#define USART3_DTREN_SIZE 1
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#define USART3_DTRDIS_OFFSET 17
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#define USART3_DTRDIS_SIZE 1
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#define USART3_RTSEN_OFFSET 18
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#define USART3_RTSEN_SIZE 1
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#define USART3_RTSDIS_OFFSET 19
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#define USART3_RTSDIS_SIZE 1
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#define USART3_COMM_TX_OFFSET 30
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#define USART3_COMM_TX_SIZE 1
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#define USART3_COMM_RX_OFFSET 31
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#define USART3_COMM_RX_SIZE 1
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/* Bitfields in MR */
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#define USART3_USART_MODE_OFFSET 0
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#define USART3_USART_MODE_SIZE 4
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#define USART3_USCLKS_OFFSET 4
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#define USART3_USCLKS_SIZE 2
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#define USART3_CHRL_OFFSET 6
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#define USART3_CHRL_SIZE 2
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#define USART3_SYNC_OFFSET 8
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#define USART3_SYNC_SIZE 1
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#define USART3_PAR_OFFSET 9
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#define USART3_PAR_SIZE 3
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#define USART3_NBSTOP_OFFSET 12
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#define USART3_NBSTOP_SIZE 2
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#define USART3_CHMODE_OFFSET 14
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#define USART3_CHMODE_SIZE 2
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#define USART3_MSBF_OFFSET 16
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#define USART3_MSBF_SIZE 1
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#define USART3_MODE9_OFFSET 17
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#define USART3_MODE9_SIZE 1
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#define USART3_CLKO_OFFSET 18
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#define USART3_CLKO_SIZE 1
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#define USART3_OVER_OFFSET 19
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#define USART3_OVER_SIZE 1
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#define USART3_INACK_OFFSET 20
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#define USART3_INACK_SIZE 1
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#define USART3_DSNACK_OFFSET 21
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#define USART3_DSNACK_SIZE 1
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#define USART3_MAX_ITERATION_OFFSET 24
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#define USART3_MAX_ITERATION_SIZE 3
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#define USART3_FILTER_OFFSET 28
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#define USART3_FILTER_SIZE 1
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/* Bitfields in CSR */
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#define USART3_RXRDY_OFFSET 0
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#define USART3_RXRDY_SIZE 1
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#define USART3_TXRDY_OFFSET 1
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#define USART3_TXRDY_SIZE 1
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#define USART3_RXBRK_OFFSET 2
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#define USART3_RXBRK_SIZE 1
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#define USART3_ENDRX_OFFSET 3
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#define USART3_ENDRX_SIZE 1
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#define USART3_ENDTX_OFFSET 4
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#define USART3_ENDTX_SIZE 1
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#define USART3_OVRE_OFFSET 5
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#define USART3_OVRE_SIZE 1
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#define USART3_FRAME_OFFSET 6
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#define USART3_FRAME_SIZE 1
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#define USART3_PARE_OFFSET 7
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#define USART3_PARE_SIZE 1
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#define USART3_TIMEOUT_OFFSET 8
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#define USART3_TIMEOUT_SIZE 1
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#define USART3_TXEMPTY_OFFSET 9
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#define USART3_TXEMPTY_SIZE 1
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#define USART3_ITERATION_OFFSET 10
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#define USART3_ITERATION_SIZE 1
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#define USART3_TXBUFE_OFFSET 11
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#define USART3_TXBUFE_SIZE 1
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#define USART3_RXBUFF_OFFSET 12
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#define USART3_RXBUFF_SIZE 1
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#define USART3_NACK_OFFSET 13
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#define USART3_NACK_SIZE 1
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#define USART3_RIIC_OFFSET 16
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#define USART3_RIIC_SIZE 1
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#define USART3_DSRIC_OFFSET 17
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#define USART3_DSRIC_SIZE 1
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#define USART3_DCDIC_OFFSET 18
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#define USART3_DCDIC_SIZE 1
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#define USART3_CTSIC_OFFSET 19
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#define USART3_CTSIC_SIZE 1
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#define USART3_RI_OFFSET 20
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#define USART3_RI_SIZE 1
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#define USART3_DSR_OFFSET 21
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#define USART3_DSR_SIZE 1
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#define USART3_DCD_OFFSET 22
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#define USART3_DCD_SIZE 1
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#define USART3_CTS_OFFSET 23
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#define USART3_CTS_SIZE 1
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/* Bitfields in RHR */
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#define USART3_RXCHR_OFFSET 0
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#define USART3_RXCHR_SIZE 9
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/* Bitfields in THR */
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#define USART3_TXCHR_OFFSET 0
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#define USART3_TXCHR_SIZE 9
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/* Bitfields in BRGR */
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#define USART3_CD_OFFSET 0
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#define USART3_CD_SIZE 16
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/* Bitfields in RTOR */
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#define USART3_TO_OFFSET 0
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#define USART3_TO_SIZE 16
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/* Bitfields in TTGR */
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#define USART3_TG_OFFSET 0
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#define USART3_TG_SIZE 8
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/* Bitfields in FIDI */
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#define USART3_FI_DI_RATIO_OFFSET 0
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#define USART3_FI_DI_RATIO_SIZE 11
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/* Bitfields in NER */
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#define USART3_NB_ERRORS_OFFSET 0
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#define USART3_NB_ERRORS_SIZE 8
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/* Bitfields in XXR */
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#define USART3_XOFF_OFFSET 0
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#define USART3_XOFF_SIZE 8
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#define USART3_XON_OFFSET 8
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#define USART3_XON_SIZE 8
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/* Bitfields in IFR */
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#define USART3_IRDA_FILTER_OFFSET 0
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#define USART3_IRDA_FILTER_SIZE 8
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/* Bitfields in RCR */
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#define USART3_RXCTR_OFFSET 0
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#define USART3_RXCTR_SIZE 16
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/* Bitfields in TCR */
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#define USART3_TXCTR_OFFSET 0
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#define USART3_TXCTR_SIZE 16
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/* Bitfields in RNCR */
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#define USART3_RXNCR_OFFSET 0
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#define USART3_RXNCR_SIZE 16
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/* Bitfields in TNCR */
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#define USART3_TXNCR_OFFSET 0
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#define USART3_TXNCR_SIZE 16
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/* Bitfields in PTCR */
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#define USART3_RXTEN_OFFSET 0
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#define USART3_RXTEN_SIZE 1
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#define USART3_RXTDIS_OFFSET 1
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#define USART3_RXTDIS_SIZE 1
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#define USART3_TXTEN_OFFSET 8
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#define USART3_TXTEN_SIZE 1
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#define USART3_TXTDIS_OFFSET 9
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#define USART3_TXTDIS_SIZE 1
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/* Constants for USART_MODE */
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#define USART3_USART_MODE_NORMAL 0
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#define USART3_USART_MODE_RS485 1
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#define USART3_USART_MODE_HARDWARE 2
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#define USART3_USART_MODE_MODEM 3
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#define USART3_USART_MODE_ISO7816_T0 4
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#define USART3_USART_MODE_ISO7816_T1 6
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#define USART3_USART_MODE_IRDA 8
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/* Constants for USCLKS */
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#define USART3_USCLKS_MCK 0
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#define USART3_USCLKS_MCK_DIV 1
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#define USART3_USCLKS_SCK 3
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/* Constants for CHRL */
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#define USART3_CHRL_5 0
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#define USART3_CHRL_6 1
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#define USART3_CHRL_7 2
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#define USART3_CHRL_8 3
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/* Constants for PAR */
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#define USART3_PAR_EVEN 0
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#define USART3_PAR_ODD 1
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#define USART3_PAR_SPACE 2
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#define USART3_PAR_MARK 3
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#define USART3_PAR_NONE 4
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#define USART3_PAR_MULTI 6
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/* Constants for NBSTOP */
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#define USART3_NBSTOP_1 0
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#define USART3_NBSTOP_1_5 1
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#define USART3_NBSTOP_2 2
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/* Constants for CHMODE */
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#define USART3_CHMODE_NORMAL 0
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#define USART3_CHMODE_ECHO 1
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#define USART3_CHMODE_LOCAL_LOOP 2
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#define USART3_CHMODE_REMOTE_LOOP 3
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/* Constants for MSBF */
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#define USART3_MSBF_LSBF 0
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#define USART3_MSBF_MSBF 1
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/* Constants for OVER */
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#define USART3_OVER_X16 0
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#define USART3_OVER_X8 1
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/* Constants for CD */
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#define USART3_CD_DISABLE 0
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#define USART3_CD_BYPASS 1
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/* Constants for TO */
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#define USART3_TO_DISABLE 0
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/* Constants for TG */
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#define USART3_TG_DISABLE 0
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/* Constants for FI_DI_RATIO */
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#define USART3_FI_DI_RATIO_DISABLE 0
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/* Bit manipulation macros */
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#define USART3_BIT(name) \
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(1 << USART3_##name##_OFFSET)
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#define USART3_BF(name,value) \
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(((value) & ((1 << USART3_##name##_SIZE) - 1)) \
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<< USART3_##name##_OFFSET)
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#define USART3_BFEXT(name,value) \
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(((value) >> USART3_##name##_OFFSET) \
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& ((1 << USART3_##name##_SIZE) - 1))
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#define USART3_BFINS(name,value,old) \
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(((old) & ~(((1 << USART3_##name##_SIZE) - 1) \
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<< USART3_##name##_OFFSET)) \
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| USART3_BF(name,value))
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/* Register access macros */
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#define usart3_readl(port,reg) \
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readl((port)->regs + USART3_##reg)
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#define usart3_writel(port,reg,value) \
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writel((value), (port)->regs + USART3_##reg)
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#endif /* __DRIVERS_ATMEL_USART_H__ */
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