upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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79 lines
2.6 KiB
79 lines
2.6 KiB
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_IC_SC520_PCI_H_
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#define _ASM_IC_SC520_PCI_H_ 1
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/* bus mapping constants (used for PCI core initialization) */ /* bus mapping constants */
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#define SC520_REG_ADDR 0x00000cf8
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#define SC520_REG_DATA 0x00000cfc
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#define SC520_ISA_MEM_PHYS 0x00000000
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#define SC520_ISA_MEM_BUS 0x00000000
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#define SC520_ISA_MEM_SIZE 0x01000000
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#define SC520_ISA_IO_PHYS 0x00000000
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#define SC520_ISA_IO_BUS 0x00000000
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#define SC520_ISA_IO_SIZE 0x00001000
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/* PCI I/O space from 0x1000 to 0xdfff
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* (make 0xe000-0xfdff available for stuff like PCCard boot) */
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#define SC520_PCI_IO_PHYS 0x00001000
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#define SC520_PCI_IO_BUS 0x00001000
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#define SC520_PCI_IO_SIZE 0x0000d000
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/* system memory from 0x00000000 to 0x0fffffff */
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#define SC520_PCI_MEMORY_PHYS 0x00000000
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#define SC520_PCI_MEMORY_BUS 0x00000000
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#define SC520_PCI_MEMORY_SIZE 0x10000000
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/* PCI bus memory from 0x10000000 to 0x26ffffff
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* (make 0x27000000 - 0x27ffffff available for stuff like PCCard boot) */
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#define SC520_PCI_MEM_PHYS 0x10000000
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#define SC520_PCI_MEM_BUS 0x10000000
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#define SC520_PCI_MEM_SIZE 0x17000000
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/* pin number used for PCI interrupt mappings */
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#define SC520_PCI_INTA 0
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#define SC520_PCI_INTB 1
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#define SC520_PCI_INTC 2
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#define SC520_PCI_INTD 3
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#define SC520_PCI_GPIRQ0 4
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#define SC520_PCI_GPIRQ1 5
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#define SC520_PCI_GPIRQ2 6
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#define SC520_PCI_GPIRQ3 7
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#define SC520_PCI_GPIRQ4 8
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#define SC520_PCI_GPIRQ5 9
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#define SC520_PCI_GPIRQ6 10
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#define SC520_PCI_GPIRQ7 11
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#define SC520_PCI_GPIRQ8 12
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#define SC520_PCI_GPIRQ9 13
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#define SC520_PCI_GPIRQ10 14
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extern int sc520_pci_ints[];
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void pci_sc520_init(struct pci_controller *hose);
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int pci_set_regions(struct pci_controller *hose);
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int pci_sc520_set_irq(int pci_pin, int irq);
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#endif
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