upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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66 lines
993 B
66 lines
993 B
/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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2004, 2005
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Free Software Foundation, Inc.
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* SPDX-License-Identifier: GPL-2.0+
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*/
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!! libgcc routines for the Renesas / SuperH SH CPUs.
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!! Contributed by Steve Chamberlain.
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!! sac@cygnus.com
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.balign 4
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.global __udivsi3
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.type __udivsi3, @function
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div8:
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div1 r5,r4
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div7:
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div1 r5,r4; div1 r5,r4; div1 r5,r4
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div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
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divx4:
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div1 r5,r4; rotcl r0
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div1 r5,r4; rotcl r0
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div1 r5,r4; rotcl r0
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rts; div1 r5,r4
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__udivsi3:
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sts.l pr,@-r15
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extu.w r5,r0
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cmp/eq r5,r0
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bf/s large_divisor
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div0u
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swap.w r4,r0
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shlr16 r4
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bsr div8
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shll16 r5
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bsr div7
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div1 r5,r4
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xtrct r4,r0
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xtrct r0,r4
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bsr div8
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swap.w r4,r4
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bsr div7
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div1 r5,r4
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lds.l @r15+,pr
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xtrct r4,r0
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swap.w r0,r0
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rotcl r0
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rts
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shlr16 r5
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large_divisor:
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mov #0,r0
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xtrct r4,r0
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xtrct r0,r4
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bsr divx4
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rotcl r0
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bsr divx4
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rotcl r0
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bsr divx4
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rotcl r0
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bsr divx4
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rotcl r0
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lds.l @r15+,pr
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rts
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rotcl r0
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