upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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186 lines
4.1 KiB
186 lines
4.1 KiB
/*
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* MPC8641 HPCN Device Tree Source
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "MPC8641HPCN";
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compatible = "mpc86xx";
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#address-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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#cpus = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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linux,phandle = <200>;
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PowerPC,8641@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K
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i-cache-size = <8000>; // L1, 32K
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timebase-frequency = <0>; // 33 MHz, from uboot
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bus-frequency = <0>; // 166 MHz
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clock-frequency = <0>; // 825 MHz, from uboot
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32-bit;
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linux,phandle = <201>;
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linux,boot-cpu;
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};
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};
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memory {
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 10000000>; // 256M at 0x0
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};
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soc8641@f8000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <0 f8000000 00100000>;
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reg = <f8000000 00100000>; // CCSRBAR 1M
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bus-frequency = <0>;
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i2c@3000 {
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device_type = "i2c";
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compatible = "fsl-i2c";
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reg = <3000 100>;
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interrupts = <1b 0>;
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interrupt-parent = <40000>;
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dfsrr;
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "mdio";
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compatible = "gianfar";
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reg = <24520 20>;
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linux,phandle = <24520>;
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ethernet-phy@0 {
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linux,phandle = <2452000>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <0>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@1 {
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linux,phandle = <2452001>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <1>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@2 {
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linux,phandle = <2452002>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <2>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@3 {
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linux,phandle = <2452003>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <24000 1000>;
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address = [ 00 E0 0C 00 73 00 ];
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interrupts = <d 3 e 3 12 3>;
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interrupt-parent = <40000>;
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phy-handle = <2452000>;
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};
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ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <25000 1000>;
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address = [ 00 E0 0C 00 73 01 ];
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interrupts = <13 3 14 3 18 3>;
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interrupt-parent = <40000>;
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phy-handle = <2452001>;
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};
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ethernet@26000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <26000 1000>;
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address = [ 00 E0 0C 00 02 FD ];
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interrupts = <F 3 10 3 11 3>;
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interrupt-parent = <40000>;
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phy-handle = <2452002>;
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};
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ethernet@27000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <27000 1000>;
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address = [ 00 E0 0C 00 03 FD ];
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interrupts = <15 3 16 3 17 3>;
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interrupt-parent = <40000>;
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phy-handle = <2452003>;
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};
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serial@4500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <4500 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 3>;
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interrupt-parent = <40000>;
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};
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serial@4600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <4600 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 3>;
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interrupt-parent = <40000>;
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};
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pic@40000 {
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linux,phandle = <40000>;
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clock-frequency = <0>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <40000 40000>;
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built-in;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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};
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};
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};
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