upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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373 lines
8.2 KiB
373 lines
8.2 KiB
/*
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* (C) Copyright 2008-2009
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* BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
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* Jens Scharsig <esw@bus-elektronik.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <exports.h>
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#include <net.h>
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#include <netdev.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pio.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_mc.h>
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#include <asm/arch/at91_common.h>
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#ifdef CONFIG_STATUS_LED
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#include <status_led.h>
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#endif
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#ifdef CONFIG_VIDEO
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#include <bus_vcxk.h>
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extern unsigned long display_width;
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extern unsigned long display_height;
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#endif
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#ifdef CONFIG_CMD_NAND
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void cpux9k2_nand_hw_init(void);
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init(void)
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{
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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/* Correct IRDA resistor problem / Set PA23_TXD in Output */
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writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer);
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gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_STATUS_LED
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status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
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#endif
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#ifdef CONFIG_CMD_NAND
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cpux9k2_nand_hw_init();
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#endif
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return 0;
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}
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int board_early_init_f(void)
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{
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at91_seriald_hw_init();
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return 0;
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}
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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uchar mac[8];
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uchar tm;
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uchar midx;
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uchar macn6, macn7;
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if (getenv("ethaddr") == NULL) {
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if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
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(uchar *) &mac, sizeof(mac)) != 0) {
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puts("Error reading MAC from EEPROM\n");
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} else {
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tm = 0;
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macn6 = 0;
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macn7 = 0xFF;
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for (midx = 0; midx < 6; midx++) {
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if ((mac[midx] != 0) && (mac[midx] != 0xFF))
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tm++;
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macn6 += mac[midx];
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macn7 ^= mac[midx];
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}
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if ((macn6 != mac[6]) || (macn7 != mac[7]))
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tm = 0;
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if (tm)
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eth_setenv_enetaddr("ethaddr", mac);
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else
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puts("Error: invalid MAC at EEPROM\n");
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}
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}
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gd->jt[XF_do_reset] = (void *) do_reset;
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#ifdef CONFIG_STATUS_LED
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status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
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#endif
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return 0;
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}
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#endif
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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udelay(10000);
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eth_init(gd->bd);
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}
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#endif
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/*
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* DRAM initialisations
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*/
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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/*
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* Ethernet initialisations
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*/
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#ifdef CONFIG_DRIVER_AT91EMAC
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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rc = at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
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return rc;
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}
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#endif
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/*
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* Disk On Chip (NAND) Millenium initialization.
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* The NAND lives in the CS2* space
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*/
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#if defined(CONFIG_CMD_NAND)
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#define MASK_ALE (1 << 22) /* our ALE is AD22 */
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#define MASK_CLE (1 << 21) /* our CLE is AD21 */
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void cpux9k2_nand_hw_init(void)
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{
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unsigned long csr;
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
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/* Setup Smart Media, fitst enable the address range of CS3 */
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writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
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/* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
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csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
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AT91_SMC_CSR_NWS(3) |
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AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
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AT91_SMC_CSR_WSEN;
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writel(csr, &mc->smc.csr[3]);
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writel(ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.asr);
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writel(ATMEL_PMX_CA_BFCK | ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE,
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&pio->pioc.pdr);
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/* Configure PC2 as input (signal Nand READY ) */
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writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.per);
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writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
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writel(ATMEL_PMX_CA_BFCK, &pio->pioc.codr);
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/* PIOC clock enabling */
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writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
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}
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static void board_nand_hwcontrol(struct mtd_info *mtd,
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int cmd, unsigned int ctrl)
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{
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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struct nand_chip *this = mtd->priv;
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ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
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if (ctrl & NAND_CTRL_CHANGE) {
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IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
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if (ctrl & NAND_CLE)
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IO_ADDR_W |= MASK_CLE;
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if (ctrl & NAND_ALE)
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IO_ADDR_W |= MASK_ALE;
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if ((ctrl & NAND_NCE))
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writel(1, &pio->pioc.codr);
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else
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writel(1, &pio->pioc.sodr);
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this->IO_ADDR_W = (void *) IO_ADDR_W;
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, this->IO_ADDR_W);
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}
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static int board_nand_dev_ready(struct mtd_info *mtd)
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{
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
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}
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int board_nand_init(struct nand_chip *nand)
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{
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cpux9k2_nand_hw_init();
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nand->ecc.mode = NAND_ECC_SOFT;
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nand->cmd_ctrl = board_nand_hwcontrol;
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nand->dev_ready = board_nand_dev_ready;
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nand->chip_delay = 20;
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return 0;
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}
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#endif
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#if defined(CONFIG_VIDEO)
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/*
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* drv_video_init
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* FUNCTION: initialize VCxK device
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*/
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int drv_video_init(void)
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{
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#ifdef CONFIG_SPLASH_SCREEN
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unsigned long splash;
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#endif
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char *s;
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unsigned long csr;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
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printf("Init Video as ");
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s = getenv("displaywidth");
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if (s != NULL)
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display_width = simple_strtoul(s, NULL, 10);
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else
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display_width = 256;
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s = getenv("displayheight");
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if (s != NULL)
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display_height = simple_strtoul(s, NULL, 10);
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else
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display_height = 256;
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printf("%ld x %ld pixel matrix\n", display_width, display_height);
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/* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */
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csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) |
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AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) |
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AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
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AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
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writel(csr, &mc->smc.csr[2]);
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writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
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vcxk_init(display_width, display_height);
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#ifdef CONFIG_SPLASH_SCREEN
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s = getenv("splashimage");
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if (s != NULL) {
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splash = simple_strtoul(s, NULL, 16);
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printf("use splashimage: %lx\n", splash);
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video_display_bitmap(splash, 0, 0);
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}
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#endif
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return 0;
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}
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#endif
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#ifdef CONFIG_SYS_I2C_SOFT
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void i2c_init_board(void)
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{
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u32 pin;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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writel(1 << ATMEL_ID_PIOA, &pmc->pcer);
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pin = ATMEL_PMX_AA_TWD | ATMEL_PMX_AA_TWCK;
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writel(pin, &pio->pioa.idr);
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writel(pin, &pio->pioa.pudr);
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writel(pin, &pio->pioa.per);
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writel(pin, &pio->pioa.oer);
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writel(pin, &pio->pioa.sodr);
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}
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#endif
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/*--------------------------------------------------------------------------*/
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#ifdef CONFIG_STATUS_LED
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void __led_toggle(led_id_t mask)
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{
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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if (readl(&pio->piod.odsr) & mask)
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writel(mask, &pio->piod.codr);
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else
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writel(mask, &pio->piod.codr);
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}
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void __led_init(led_id_t mask, int state)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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writel(1 << ATMEL_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
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/* Disable peripherals on LEDs */
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writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
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/* Enable pins as outputs */
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writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
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/* Turn all LEDs OFF */
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writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
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__led_set(mask, state);
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}
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void __led_set(led_id_t mask, int state)
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{
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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if (state == STATUS_LED_ON)
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writel(mask, &pio->piod.codr);
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else
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writel(mask, &pio->piod.sodr);
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}
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#endif
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/*---------------------------------------------------------------------------*/
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int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int rcode = 0;
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ulong side;
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ulong bright;
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switch (argc) {
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case 3:
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side = simple_strtoul(argv[1], NULL, 10);
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bright = simple_strtoul(argv[2], NULL, 10);
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if ((side >= 0) && (side <= 3) &&
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(bright >= 0) && (bright <= 1000)) {
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vcxk_setbrightness(side, bright);
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rcode = 0;
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} else {
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printf("parameters out of range\n");
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printf("Usage:\n%s\n", cmdtp->usage);
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rcode = 1;
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}
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break;
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default:
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printf("Usage:\n%s\n", cmdtp->usage);
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rcode = 1;
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break;
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}
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return rcode;
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}
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/*---------------------------------------------------------------------------*/
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U_BOOT_CMD(
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bright, 3, 0, do_brightness,
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"bright - sets the display brightness\n",
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" <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
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);
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/* EOF cpu9k2.c */
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