upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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150 lines
3.6 KiB
150 lines
3.6 KiB
/*
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* am35x.c - TI's AM35x platform specific usb wrapper functions.
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*
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* Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
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*
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* Based on drivers/usb/musb/da8xx.c
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*
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* Copyright (c) 2010 Texas Instruments Incorporated
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include "am35x.h"
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/* MUSB platform configuration */
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struct musb_config musb_cfg = {
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.regs = (struct musb_regs *)AM35X_USB_OTG_CORE_BASE,
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.timeout = AM35X_USB_OTG_TIMEOUT,
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.musb_speed = 0,
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};
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/*
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* Enable the USB phy
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*/
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static u8 phy_on(void)
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{
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u32 devconf2;
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u32 timeout;
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devconf2 = readl(&am35x_scm_general_regs->devconf2);
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devconf2 &= ~(DEVCONF2_RESET | DEVCONF2_PHYPWRDN | DEVCONF2_OTGPWRDN |
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DEVCONF2_OTGMODE | DEVCONF2_REFFREQ |
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DEVCONF2_PHY_GPIOMODE);
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devconf2 |= DEVCONF2_SESENDEN | DEVCONF2_VBDTCTEN | DEVCONF2_PHY_PLLON |
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DEVCONF2_REFFREQ_13MHZ | DEVCONF2_DATPOL;
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writel(devconf2, &am35x_scm_general_regs->devconf2);
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/* wait until the USB phy is turned on */
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timeout = musb_cfg.timeout;
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while (timeout--)
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if (readl(&am35x_scm_general_regs->devconf2) & DEVCONF2_PHYCKGD)
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return 1;
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/* USB phy was not turned on */
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return 0;
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}
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/*
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* Disable the USB phy
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*/
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static void phy_off(void)
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{
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u32 devconf2;
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/*
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* Power down the on-chip PHY.
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*/
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devconf2 = readl(&am35x_scm_general_regs->devconf2);
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devconf2 &= ~DEVCONF2_PHY_PLLON;
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devconf2 |= DEVCONF2_PHYPWRDN | DEVCONF2_OTGPWRDN;
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writel(devconf2, &am35x_scm_general_regs->devconf2);
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}
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/*
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* This function performs platform specific initialization for usb0.
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*/
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int musb_platform_init(void)
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{
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u32 revision;
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u32 sw_reset;
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/* global usb reset */
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sw_reset = readl(&am35x_scm_general_regs->ip_sw_reset);
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sw_reset |= (1 << 0);
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writel(sw_reset, &am35x_scm_general_regs->ip_sw_reset);
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sw_reset &= ~(1 << 0);
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writel(sw_reset, &am35x_scm_general_regs->ip_sw_reset);
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/* reset the controller */
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writel(0x1, &am35x_usb_regs->control);
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udelay(5000);
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/* start the on-chip usb phy and its pll */
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if (phy_on() == 0)
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return -1;
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/* Returns zero if e.g. not clocked */
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revision = readl(&am35x_usb_regs->revision);
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if (revision == 0)
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return -1;
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return 0;
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}
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/*
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* This function performs platform specific deinitialization for usb0.
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*/
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void musb_platform_deinit(void)
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{
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/* Turn off the phy */
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phy_off();
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}
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/*
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* This function reads data from endpoint fifo for AM35x
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* which supports only 32bit read operation.
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*
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* ep - endpoint number
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* length - number of bytes to read from FIFO
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* fifo_data - pointer to data buffer into which data is read
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*/
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__attribute__((weak))
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void read_fifo(u8 ep, u32 length, void *fifo_data)
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{
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u8 *data = (u8 *)fifo_data;
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u32 val;
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int i;
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/* select the endpoint index */
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writeb(ep, &musbr->index);
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if (length > 4) {
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for (i = 0; i < (length >> 2); i++) {
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val = readl(&musbr->fifox[ep]);
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memcpy(data, &val, 4);
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data += 4;
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}
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length %= 4;
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}
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if (length > 0) {
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val = readl(&musbr->fifox[ep]);
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memcpy(data, &val, length);
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}
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}
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