upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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66 lines
1.7 KiB
66 lines
1.7 KiB
/*
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* board.c
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*
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* Common board functions for AM33XX based boards
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/ddr_defs.h>
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#include <asm/arch/clock.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
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struct timer_reg *timerreg = (struct timer_reg *)DM_TIMER2_BASE;
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/*
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* early system init of muxing and clocks.
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*/
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void s_init(u32 in_ddr)
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{
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/* WDT1 is already running when the bootloader gets control
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* Disable it to avoid "random" resets
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*/
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writel(0xAAAA, &wdtimer->wdtwspr);
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while (readl(&wdtimer->wdtwwps) != 0x0)
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;
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writel(0x5555, &wdtimer->wdtwspr);
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while (readl(&wdtimer->wdtwwps) != 0x0)
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;
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/* Setup the PLLs and the clocks for the peripherals */
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#ifdef CONFIG_SETUP_PLL
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pll_init();
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#endif
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if (!in_ddr)
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config_ddr();
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}
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/* Initialize timer */
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void init_timer(void)
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{
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/* Reset the Timer */
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writel(0x2, (&timerreg->tsicrreg));
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/* Wait until the reset is done */
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while (readl(&timerreg->tiocpcfgreg) & 1)
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;
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/* Start the Timer */
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writel(0x1, (&timerreg->tclrreg));
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}
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