upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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148 lines
3.8 KiB
148 lines
3.8 KiB
/*
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* (C) Copyright 2009
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* Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#if defined(CONFIG_SPEAR300)
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#define CONFIG_SPEAR3XX
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#elif defined(CONFIG_SPEAR310)
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#define CONFIG_SPEAR3XX
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#elif defined(CONFIG_SPEAR320)
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#define CONFIG_SPEAR3XX
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#endif
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#if defined(CONFIG_USBTTY)
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#define CONFIG_SPEAR_USBTTY
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#endif
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#include <configs/spear-common.h>
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/* Ethernet driver configuration */
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#define CONFIG_DW_ALTDESCRIPTOR
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#if defined(CONFIG_SPEAR310)
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#define CONFIG_MACB
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#define CONFIG_MACB0_PHY 0x01
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#define CONFIG_MACB1_PHY 0x03
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#define CONFIG_MACB2_PHY 0x05
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#define CONFIG_MACB3_PHY 0x07
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#elif defined(CONFIG_SPEAR320)
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#define CONFIG_MACB
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#define CONFIG_MACB0_PHY 0x01
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#endif
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/* Serial Configuration (PL011) */
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#define CONFIG_SYS_SERIAL0 0xD0000000
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#if defined(CONFIG_SPEAR300)
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#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0}
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#elif defined(CONFIG_SPEAR310)
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#if (CONFIG_CONS_INDEX)
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#undef CONFIG_PL011_CLOCK
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#define CONFIG_PL011_CLOCK (83 * 1000 * 1000)
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#endif
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#define CONFIG_SYS_SERIAL1 0xB2000000
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#define CONFIG_SYS_SERIAL2 0xB2080000
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#define CONFIG_SYS_SERIAL3 0xB2100000
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#define CONFIG_SYS_SERIAL4 0xB2180000
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#define CONFIG_SYS_SERIAL5 0xB2200000
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#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1, \
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(void *)CONFIG_SYS_SERIAL2, \
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(void *)CONFIG_SYS_SERIAL3, \
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(void *)CONFIG_SYS_SERIAL4, \
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(void *)CONFIG_SYS_SERIAL5 }
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#elif defined(CONFIG_SPEAR320)
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#if (CONFIG_CONS_INDEX)
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#undef CONFIG_PL011_CLOCK
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#define CONFIG_PL011_CLOCK (83 * 1000 * 1000)
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#endif
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#define CONFIG_SYS_SERIAL1 0xA3000000
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#define CONFIG_SYS_SERIAL2 0xA4000000
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#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1, \
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(void *)CONFIG_SYS_SERIAL2 }
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#endif
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#if defined(CONFIG_SPEAR_EMI)
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#if defined(CONFIG_SPEAR310)
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_BASE 0x50000000
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#define CONFIG_SYS_CS1_FLASH_BASE 0x60000000
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#define CONFIG_SYS_CS2_FLASH_BASE 0x70000000
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#define CONFIG_SYS_CS3_FLASH_BASE 0x80000000
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#define CONFIG_SYS_CS4_FLASH_BASE 0x90000000
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#define CONFIG_SYS_CS5_FLASH_BASE 0xA0000000
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
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CONFIG_SYS_CS1_FLASH_BASE, \
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CONFIG_SYS_CS2_FLASH_BASE, \
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CONFIG_SYS_CS3_FLASH_BASE, \
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CONFIG_SYS_CS4_FLASH_BASE, \
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CONFIG_SYS_CS5_FLASH_BASE }
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#define CONFIG_SYS_MAX_FLASH_BANKS 6
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#elif defined(CONFIG_SPEAR320)
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_BASE 0x44000000
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#define CONFIG_SYS_CS1_FLASH_BASE 0x45000000
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#define CONFIG_SYS_CS2_FLASH_BASE 0x46000000
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#define CONFIG_SYS_CS3_FLASH_BASE 0x47000000
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
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CONFIG_SYS_CS1_FLASH_BASE, \
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CONFIG_SYS_CS2_FLASH_BASE, \
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CONFIG_SYS_CS3_FLASH_BASE }
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#define CONFIG_SYS_MAX_FLASH_BANKS 4
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#endif
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#define CONFIG_SYS_MAX_FLASH_SECT (127 + 8)
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#endif
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/* NAND flash configuration */
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#define CONFIG_SYS_FSMC_NAND_SP
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#define CONFIG_SYS_FSMC_NAND_8BIT
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#if defined(CONFIG_SPEAR300)
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#define CONFIG_SYS_NAND_BASE 0x80000000
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#elif defined(CONFIG_SPEAR310)
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#elif defined(CONFIG_SPEAR320)
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#define CONFIG_SYS_NAND_BASE 0x50000000
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#endif
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/* Environment Settings */
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#if defined(CONFIG_SPEAR300)
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#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY
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#elif defined(CONFIG_SPEAR310) || defined(CONFIG_SPEAR320)
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#define CONFIG_EXTRA_ENV_UNLOCK "unlock=yes\0"
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#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY \
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CONFIG_EXTRA_ENV_UNLOCK
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#endif
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#endif /* __CONFIG_H */
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