upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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85 lines
2.0 KiB
85 lines
2.0 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2007 Michal Simek
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*
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* Michal SIMEK <monstr@monstr.eu>
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*/
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/* FSL macros */
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#define NGET(val, fslnum) \
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__asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
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#define GET(val, fslnum) \
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__asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
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#define NCGET(val, fslnum) \
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__asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
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#define CGET(val, fslnum) \
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__asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
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#define NPUT(val, fslnum) \
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__asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
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#define PUT(val, fslnum) \
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__asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
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#define NCPUT(val, fslnum) \
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__asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
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#define CPUT(val, fslnum) \
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__asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
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/* CPU dependent */
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/* machine status register */
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#define MFS(val, reg) \
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__asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
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#define MTS(val, reg) \
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__asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
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/* get return address from interrupt */
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#define R14(val) \
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__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
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/* get return address from interrupt */
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#define R17(val) \
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__asm__ __volatile__ ("addi %0, r17, 0" : "=r" (val));
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#define NOP __asm__ __volatile__ ("nop");
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/* use machine status registe USE_MSR_REG */
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1
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#define MSRSET(val) \
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__asm__ __volatile__ ("msrset r0," #val );
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#define MSRCLR(val) \
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__asm__ __volatile__ ("msrclr r0," #val );
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#else
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#define MSRSET(val) \
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{ \
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register unsigned tmp; \
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__asm__ __volatile__ (" \
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mfs %0, rmsr; \
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ori %0, %0, "#val"; \
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mts rmsr, %0; \
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nop;" \
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: "=r" (tmp) \
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: "d" (val) \
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: "memory"); \
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}
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#define MSRCLR(val) \
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{ \
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register unsigned tmp; \
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__asm__ __volatile__ (" \
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mfs %0, rmsr; \
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andi %0, %0, ~"#val"; \
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mts rmsr, %0; \
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nop;" \
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: "=r" (tmp) \
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: "d" (val) \
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: "memory"); \
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}
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#endif
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