upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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246 lines
4.5 KiB
246 lines
4.5 KiB
/*
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* Copyright 2010, Google Inc.
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*
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* Brought in from coreboot uldivmod.S
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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/*
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* A, Q = r0 + (r1 << 32)
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* B, R = r2 + (r3 << 32)
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* A / B = Q ... R
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*/
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A_0 .req r0
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A_1 .req r1
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B_0 .req r2
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B_1 .req r3
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C_0 .req r4
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C_1 .req r5
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D_0 .req r6
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D_1 .req r7
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Q_0 .req r0
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Q_1 .req r1
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R_0 .req r2
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R_1 .req r3
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THUMB(
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TMP .req r8
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)
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.pushsection .text.__aeabi_uldivmod, "ax"
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ENTRY(__aeabi_uldivmod)
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stmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) lr}
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@ Test if B == 0
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orrs ip, B_0, B_1 @ Z set -> B == 0
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beq L_div_by_0
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@ Test if B is power of 2: (B & (B - 1)) == 0
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subs C_0, B_0, #1
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sbc C_1, B_1, #0
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tst C_0, B_0
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tsteq B_1, C_1
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beq L_pow2
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@ Test if A_1 == B_1 == 0
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orrs ip, A_1, B_1
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beq L_div_32_32
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L_div_64_64:
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/* CLZ only exists in ARM architecture version 5 and above. */
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#ifdef HAVE_CLZ
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mov C_0, #1
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mov C_1, #0
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@ D_0 = clz A
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teq A_1, #0
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clz D_0, A_1
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clzeq ip, A_0
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addeq D_0, D_0, ip
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@ D_1 = clz B
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teq B_1, #0
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clz D_1, B_1
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clzeq ip, B_0
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addeq D_1, D_1, ip
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@ if clz B - clz A > 0
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subs D_0, D_1, D_0
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bls L_done_shift
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@ B <<= (clz B - clz A)
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subs D_1, D_0, #32
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rsb ip, D_0, #32
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movmi B_1, B_1, lsl D_0
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ARM( orrmi B_1, B_1, B_0, lsr ip )
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THUMB( lsrmi TMP, B_0, ip )
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THUMB( orrmi B_1, B_1, TMP )
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movpl B_1, B_0, lsl D_1
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mov B_0, B_0, lsl D_0
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@ C = 1 << (clz B - clz A)
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movmi C_1, C_1, lsl D_0
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ARM( orrmi C_1, C_1, C_0, lsr ip )
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THUMB( lsrmi TMP, C_0, ip )
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THUMB( orrmi C_1, C_1, TMP )
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movpl C_1, C_0, lsl D_1
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mov C_0, C_0, lsl D_0
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L_done_shift:
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mov D_0, #0
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mov D_1, #0
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@ C: current bit; D: result
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#else
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@ C: current bit; D: result
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mov C_0, #1
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mov C_1, #0
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mov D_0, #0
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mov D_1, #0
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L_lsl_4:
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cmp B_1, #0x10000000
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cmpcc B_1, A_1
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cmpeq B_0, A_0
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bcs L_lsl_1
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@ B <<= 4
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mov B_1, B_1, lsl #4
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orr B_1, B_1, B_0, lsr #28
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mov B_0, B_0, lsl #4
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@ C <<= 4
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mov C_1, C_1, lsl #4
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orr C_1, C_1, C_0, lsr #28
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mov C_0, C_0, lsl #4
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b L_lsl_4
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L_lsl_1:
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cmp B_1, #0x80000000
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cmpcc B_1, A_1
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cmpeq B_0, A_0
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bcs L_subtract
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@ B <<= 1
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mov B_1, B_1, lsl #1
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orr B_1, B_1, B_0, lsr #31
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mov B_0, B_0, lsl #1
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@ C <<= 1
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mov C_1, C_1, lsl #1
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orr C_1, C_1, C_0, lsr #31
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mov C_0, C_0, lsl #1
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b L_lsl_1
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#endif
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L_subtract:
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@ if A >= B
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cmp A_1, B_1
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cmpeq A_0, B_0
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bcc L_update
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@ A -= B
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subs A_0, A_0, B_0
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sbc A_1, A_1, B_1
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@ D |= C
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orr D_0, D_0, C_0
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orr D_1, D_1, C_1
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L_update:
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@ if A == 0: break
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orrs ip, A_1, A_0
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beq L_exit
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@ C >>= 1
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movs C_1, C_1, lsr #1
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movs C_0, C_0, rrx
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@ if C == 0: break
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orrs ip, C_1, C_0
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beq L_exit
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@ B >>= 1
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movs B_1, B_1, lsr #1
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mov B_0, B_0, rrx
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b L_subtract
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L_exit:
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@ Note: A, B & Q, R are aliases
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mov R_0, A_0
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mov R_1, A_1
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mov Q_0, D_0
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mov Q_1, D_1
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ldmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) pc}
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L_div_32_32:
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@ Note: A_0 & r0 are aliases
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@ Q_1 r1
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mov r1, B_0
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bl __aeabi_uidivmod
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mov R_0, r1
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mov R_1, #0
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mov Q_1, #0
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ldmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) pc}
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L_pow2:
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#ifdef HAVE_CLZ
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@ Note: A, B and Q, R are aliases
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@ R = A & (B - 1)
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and C_0, A_0, C_0
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and C_1, A_1, C_1
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@ Q = A >> log2(B)
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@ Note: B must not be 0 here!
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clz D_0, B_0
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add D_1, D_0, #1
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rsbs D_0, D_0, #31
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bpl L_1
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clz D_0, B_1
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rsb D_0, D_0, #31
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mov A_0, A_1, lsr D_0
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add D_0, D_0, #32
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L_1:
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movpl A_0, A_0, lsr D_0
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ARM( orrpl A_0, A_0, A_1, lsl D_1 )
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THUMB( lslpl TMP, A_1, D_1 )
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THUMB( orrpl A_0, A_0, TMP )
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mov A_1, A_1, lsr D_0
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@ Mov back C to R
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mov R_0, C_0
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mov R_1, C_1
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ldmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) pc}
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#else
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@ Note: A, B and Q, R are aliases
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@ R = A & (B - 1)
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and C_0, A_0, C_0
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and C_1, A_1, C_1
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@ Q = A >> log2(B)
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@ Note: B must not be 0 here!
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@ Count the leading zeroes in B.
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mov D_0, #0
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orrs B_0, B_0, B_0
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@ If B is greater than 1 << 31, divide A and B by 1 << 32.
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moveq A_0, A_1
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moveq A_1, #0
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moveq B_0, B_1
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@ Count the remaining leading zeroes in B.
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movs B_1, B_0, lsl #16
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addeq D_0, #16
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moveq B_0, B_0, lsr #16
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tst B_0, #0xff
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addeq D_0, #8
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moveq B_0, B_0, lsr #8
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tst B_0, #0xf
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addeq D_0, #4
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moveq B_0, B_0, lsr #4
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tst B_0, #0x3
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addeq D_0, #2
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moveq B_0, B_0, lsr #2
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tst B_0, #0x1
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addeq D_0, #1
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@ Shift A to the right by the appropriate amount.
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rsb D_1, D_0, #32
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mov Q_0, A_0, lsr D_0
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ARM( orr Q_0, Q_0, A_1, lsl D_1 )
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THUMB( lsl A_1, D_1 )
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THUMB( orr Q_0, A_1 )
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mov Q_1, A_1, lsr D_0
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@ Move C to R
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mov R_0, C_0
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mov R_1, C_1
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ldmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) pc}
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#endif
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L_div_by_0:
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bl __div0
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@ As wrong as it could be
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mov Q_0, #0
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mov Q_1, #0
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mov R_0, #0
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mov R_1, #0
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ldmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) pc}
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ENDPROC(__aeabi_uldivmod)
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.popsection
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