upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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88 lines
1.7 KiB
88 lines
1.7 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2012 The Chromium OS Authors.
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*
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* Portions of this file are derived from the Linux kernel source
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* Copyright (C) 1991, 1992 Linus Torvalds
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*/
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#ifndef __X86_CONTROL_REGS_H
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#define __X86_CONTROL_REGS_H
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/*
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* The memory clobber prevents the GCC from reordering the read/write order
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* of CR0
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*/
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static inline unsigned long read_cr0(void)
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{
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unsigned long val;
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asm volatile ("movl %%cr0, %0" : "=r" (val) : : "memory");
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return val;
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}
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static inline void write_cr0(unsigned long val)
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{
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asm volatile ("movl %0, %%cr0" : : "r" (val) : "memory");
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}
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static inline unsigned long read_cr2(void)
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{
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unsigned long val;
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asm volatile("mov %%cr2,%0\n\t" : "=r" (val) : : "memory");
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return val;
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}
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static inline unsigned long read_cr3(void)
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{
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unsigned long val;
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asm volatile("mov %%cr3,%0\n\t" : "=r" (val) : : "memory");
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return val;
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}
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static inline unsigned long read_cr4(void)
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{
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unsigned long val;
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asm volatile("mov %%cr4,%0\n\t" : "=r" (val) : : "memory");
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return val;
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}
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static inline unsigned long get_debugreg(int regno)
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{
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unsigned long val = 0; /* Damn you, gcc! */
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switch (regno) {
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case 0:
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asm("mov %%db0, %0" : "=r" (val));
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break;
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case 1:
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asm("mov %%db1, %0" : "=r" (val));
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break;
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case 2:
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asm("mov %%db2, %0" : "=r" (val));
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break;
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case 3:
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asm("mov %%db3, %0" : "=r" (val));
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break;
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case 6:
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asm("mov %%db6, %0" : "=r" (val));
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break;
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case 7:
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asm("mov %%db7, %0" : "=r" (val));
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break;
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default:
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val = 0;
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}
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return val;
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}
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#endif
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