upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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64 lines
1.9 KiB
64 lines
1.9 KiB
* TSEC-compatible ethernet nodes
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Properties:
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- compatible : Should be "fsl,tsec"
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- reg : Offset and length of the register set for the device
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- phy-handle : See ethernet.txt file in the same directory.
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- phy-connection-type : See ethernet.txt file in the same directory. This
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property is only really needed if the connection is of type "rgmii-id",
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"rgmii-rxid" and "rgmii-txid" as all other connection types are detected
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by hardware.
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Example:
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ethernet@24000 {
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compatible = "fsl,tsec";
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reg = <0x24000 0x1000>;
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phy-handle = <&phy0>;
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phy-connection-type = "sgmii";
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};
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Child nodes of the TSEC controller are typically the individual PHY devices
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connected via the MDIO bus (sometimes the MDIO bus controller is separate).
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* MDIO IO device
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The MDIO is a bus to which the PHY devices are connected. For each
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device that exists on this bus, a PHY node should be created.
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Required properties:
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- compatible : Should define the compatible device type for the
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mdio. Currently supported string/device is "fsl,tsec-mdio".
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- reg : Offset and length of the register set for the device
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Example:
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mdio@24520 {
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compatible = "fsl,tsec-mdio";
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reg = <0x24520 0x20>;
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ethernet-phy@0 {
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reg = <0>;
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};
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};
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* TBI Internal MDIO bus
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As of this writing, every tsec is associated with an internal TBI PHY.
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This PHY is accessed through the local MDIO bus. These buses are defined
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similarly to the mdio buses. The TBI PHYs underneath them are similar to
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normal PHYs, but the reg property is considered instructive, rather than
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descriptive. The reg property should be chosen so it doesn't interfere
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with other PHYs on the bus. The TBI PHYs are referred to by a "tbi-handle"
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property under the tsec node, which has a similar meaning of "phy-handle".
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Example:
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ethernet@24000 {
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phy-handle = <&tbi1>;
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};
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mdio@24520 {
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tbi1: tbi-phy@1f {
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reg = <0x1f>;
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};
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};
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