upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
32 lines
777 B
32 lines
777 B
/*
|
|
* (C) Copyright 2010
|
|
* Texas Instruments, <www.ti.com>
|
|
*
|
|
* Steve Sakoman <steve@sakoman.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <asm/arch/cpu.h>
|
|
#include <asm/arch/sys_proto.h>
|
|
|
|
struct gpmc *gpmc_cfg;
|
|
|
|
/*****************************************************
|
|
* gpmc_init(): init gpmc bus
|
|
* This code can only be executed from SRAM or SDRAM.
|
|
*****************************************************/
|
|
void gpmc_init(void)
|
|
{
|
|
gpmc_cfg = (struct gpmc *)GPMC_BASE;
|
|
|
|
/* global settings */
|
|
writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */
|
|
writel(0, &gpmc_cfg->timeout_control);/* timeout disable */
|
|
|
|
/*
|
|
* Disable the GPMC0 config set by ROM code
|
|
* It conflicts with our MPDB (both at 0x08000000)
|
|
*/
|
|
writel(0, &gpmc_cfg->cs[0].config7);
|
|
}
|
|
|