upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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115 lines
3.2 KiB
115 lines
3.2 KiB
/*
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* Copyright (C) 2008 Atmel Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_AVR32_HMATRIX_COMMON_H__
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#define __ASM_AVR32_HMATRIX_COMMON_H__
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/* HMATRIX register offsets */
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struct hmatrix_regs {
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u32 MCFG[16];
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u32 SCFG[16];
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struct {
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u32 A;
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u32 B;
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} PRS[16];
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u32 MRCR;
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u32 __reserved[3];
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u32 SFR[16];
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};
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/* Bitfields in MCFG */
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#define HMATRIX_ULBT_OFFSET 0
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#define HMATRIX_ULBT_SIZE 3
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/* Bitfields in SCFG */
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#define HMATRIX_SLOT_CYCLE_OFFSET 0
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#define HMATRIX_SLOT_CYCLE_SIZE 8
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#define HMATRIX_DEFMSTR_TYPE_OFFSET 16
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#define HMATRIX_DEFMSTR_TYPE_SIZE 2
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#define HMATRIX_FIXED_DEFMSTR_OFFSET 18
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#define HMATRIX_FIXED_DEFMSTR_SIZE 4
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#define HMATRIX_ARBT_OFFSET 24
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#define HMATRIX_ARBT_SIZE 1
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/* Bitfields in PRS.A */
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#define HMATRIX_M0PR_OFFSET 0
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#define HMATRIX_M0PR_SIZE 4
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#define HMATRIX_M1PR_OFFSET 4
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#define HMATRIX_M1PR_SIZE 4
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#define HMATRIX_M2PR_OFFSET 8
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#define HMATRIX_M2PR_SIZE 4
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#define HMATRIX_M3PR_OFFSET 12
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#define HMATRIX_M3PR_SIZE 4
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#define HMATRIX_M4PR_OFFSET 16
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#define HMATRIX_M4PR_SIZE 4
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#define HMATRIX_M5PR_OFFSET 20
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#define HMATRIX_M5PR_SIZE 4
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#define HMATRIX_M6PR_OFFSET 24
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#define HMATRIX_M6PR_SIZE 4
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#define HMATRIX_M7PR_OFFSET 28
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#define HMATRIX_M7PR_SIZE 4
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/* Bitfields in PRS.B */
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#define HMATRIX_M8PR_OFFSET 0
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#define HMATRIX_M8PR_SIZE 4
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#define HMATRIX_M9PR_OFFSET 4
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#define HMATRIX_M9PR_SIZE 4
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#define HMATRIX_M10PR_OFFSET 8
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#define HMATRIX_M10PR_SIZE 4
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#define HMATRIX_M11PR_OFFSET 12
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#define HMATRIX_M11PR_SIZE 4
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#define HMATRIX_M12PR_OFFSET 16
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#define HMATRIX_M12PR_SIZE 4
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#define HMATRIX_M13PR_OFFSET 20
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#define HMATRIX_M13PR_SIZE 4
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#define HMATRIX_M14PR_OFFSET 24
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#define HMATRIX_M14PR_SIZE 4
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#define HMATRIX_M15PR_OFFSET 28
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#define HMATRIX_M15PR_SIZE 4
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/* Constants for ULBT */
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#define HMATRIX_ULBT_INFINITE 0
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#define HMATRIX_ULBT_SINGLE 1
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#define HMATRIX_ULBT_FOUR_BEAT 2
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#define HMATRIX_ULBT_EIGHT_BEAT 3
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#define HMATRIX_ULBT_SIXTEEN_BEAT 4
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/* Constants for DEFMSTR_TYPE */
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#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0
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#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1
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#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2
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/* Constants for ARBT */
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#define HMATRIX_ARBT_ROUND_ROBIN 0
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#define HMATRIX_ARBT_FIXED_PRIORITY 1
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/* Bit manipulation macros */
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#define HMATRIX_BIT(name) \
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(1 << HMATRIX_##name##_OFFSET)
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#define HMATRIX_BF(name,value) \
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(((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \
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<< HMATRIX_##name##_OFFSET)
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#define HMATRIX_BFEXT(name,value) \
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(((value) >> HMATRIX_##name##_OFFSET) \
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& ((1 << HMATRIX_##name##_SIZE) - 1))
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#define HMATRIX_BFINS(name,value,old) \
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(((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \
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<< HMATRIX_##name##_OFFSET)) \
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| HMATRIX_BF(name,value))
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/* Register access macros */
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#define __hmatrix_reg(reg) \
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(((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg)
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#define hmatrix_read(reg) \
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(__hmatrix_reg(reg))
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#define hmatrix_write(reg, value) \
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do { __hmatrix_reg(reg) = (value); } while (0)
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#define hmatrix_slave_read(slave, reg) \
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hmatrix_read(reg[HMATRIX_SLAVE_##slave])
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#define hmatrix_slave_write(slave, reg, value) \
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hmatrix_write(reg[HMATRIX_SLAVE_##slave], value)
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#endif /* __ASM_AVR32_HMATRIX_COMMON_H__ */
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