upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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173 lines
3.0 KiB
173 lines
3.0 KiB
/*
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* (C) Copyright 2000-2009
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <timer.h>
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#include <watchdog.h>
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#include <div64.h>
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#include <asm/io.h>
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#ifndef CONFIG_WD_PERIOD
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# define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default */
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_SYS_TIMER_RATE
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/* Returns tick rate in ticks per second */
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ulong notrace get_tbclk(void)
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{
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return CONFIG_SYS_TIMER_RATE;
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}
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#endif
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#ifdef CONFIG_SYS_TIMER_COUNTER
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unsigned long notrace timer_read_counter(void)
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{
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#ifdef CONFIG_SYS_TIMER_COUNTS_DOWN
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return ~readl(CONFIG_SYS_TIMER_COUNTER);
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#else
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return readl(CONFIG_SYS_TIMER_COUNTER);
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#endif
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}
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ulong timer_get_boot_us(void)
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{
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ulong count = timer_read_counter();
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#if CONFIG_SYS_TIMER_RATE == 1000000
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return count;
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#elif CONFIG_SYS_TIMER_RATE > 1000000
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return lldiv(count, CONFIG_SYS_TIMER_RATE / 1000000);
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#elif defined(CONFIG_SYS_TIMER_RATE)
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return (unsigned long long)count * 1000000 / CONFIG_SYS_TIMER_RATE;
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#else
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/* Assume the counter is in microseconds */
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return count;
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#endif
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}
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#else
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extern unsigned long __weak timer_read_counter(void);
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#endif
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#ifdef CONFIG_TIMER
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ulong notrace get_tbclk(void)
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{
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if (!gd->timer) {
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#ifdef CONFIG_TIMER_EARLY
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return timer_early_get_rate();
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#else
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int ret;
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ret = dm_timer_init();
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if (ret)
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return ret;
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#endif
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}
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return timer_get_rate(gd->timer);
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}
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uint64_t notrace get_ticks(void)
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{
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u64 count;
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int ret;
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if (!gd->timer) {
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#ifdef CONFIG_TIMER_EARLY
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return timer_early_get_count();
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#else
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int ret;
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ret = dm_timer_init();
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if (ret)
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return ret;
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#endif
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}
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ret = timer_get_count(gd->timer, &count);
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if (ret)
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return ret;
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return count;
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}
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#else /* !CONFIG_TIMER */
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uint64_t __weak notrace get_ticks(void)
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{
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unsigned long now = timer_read_counter();
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/* increment tbu if tbl has rolled over */
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if (now < gd->timebase_l)
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gd->timebase_h++;
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gd->timebase_l = now;
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return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
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}
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#endif /* CONFIG_TIMER */
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/* Returns time in milliseconds */
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static uint64_t notrace tick_to_time(uint64_t tick)
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{
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ulong div = get_tbclk();
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tick *= CONFIG_SYS_HZ;
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do_div(tick, div);
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return tick;
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}
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int __weak timer_init(void)
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{
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return 0;
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}
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/* Returns time in milliseconds */
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ulong __weak get_timer(ulong base)
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{
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return tick_to_time(get_ticks()) - base;
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}
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unsigned long __weak notrace timer_get_us(void)
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{
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return tick_to_time(get_ticks() * 1000);
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}
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static uint64_t usec_to_tick(unsigned long usec)
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{
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uint64_t tick = usec;
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tick *= get_tbclk();
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do_div(tick, 1000000);
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return tick;
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}
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void __weak __udelay(unsigned long usec)
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{
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uint64_t tmp;
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tmp = get_ticks() + usec_to_tick(usec); /* get current timestamp */
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while (get_ticks() < tmp+1) /* loop till event */
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/*NOP*/;
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}
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/* ------------------------------------------------------------------------- */
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void udelay(unsigned long usec)
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{
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ulong kv;
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do {
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WATCHDOG_RESET();
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kv = usec > CONFIG_WD_PERIOD ? CONFIG_WD_PERIOD : usec;
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__udelay (kv);
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usec -= kv;
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} while(usec);
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}
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