upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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279 lines
6.5 KiB
279 lines
6.5 KiB
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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* Kshitij Gupta <Kshitij@ti.com>
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <div64.h>
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DECLARE_GLOBAL_DATA_PTR;
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void flash__init (void);
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void ether__init (void);
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void peripheral_power_enable (void);
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#if defined(CONFIG_SHOW_BOOT_PROGRESS)
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void show_boot_progress(int progress)
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{
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printf("Boot reached stage %d\n", progress);
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}
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#endif
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#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* arch number of Integrator Board */
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gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x00000100;
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gd->flags = 0;
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#ifdef CONFIG_CM_REMAP
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extern void cm_remap(void);
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cm_remap(); /* remaps writeable memory to 0x00000000 */
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#endif
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icache_enable ();
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flash__init ();
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ether__init ();
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return 0;
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}
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int misc_init_r (void)
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{
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setenv("verify", "n");
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return (0);
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}
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/******************************
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Routine:
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Description:
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******************************/
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void flash__init (void)
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{
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}
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/*************************************************************
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Routine:ether__init
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Description: take the Ethernet controller out of reset and wait
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for the EEPROM load to complete.
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*************************************************************/
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void ether__init (void)
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{
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}
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/******************************
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Routine:
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Description:
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******************************/
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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#ifdef CONFIG_CM_SPD_DETECT
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{
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extern void dram_query(void);
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unsigned long cm_reg_sdram;
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unsigned long sdram_shift;
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dram_query(); /* Assembler accesses to CM registers */
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/* Queries the SPD values */
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/* Obtain the SDRAM size from the CM SDRAM register */
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cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
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/* Register SDRAM size
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*
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* 0xXXXXXXbbb000bb 16 MB
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* 0xXXXXXXbbb001bb 32 MB
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* 0xXXXXXXbbb010bb 64 MB
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* 0xXXXXXXbbb011bb 128 MB
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* 0xXXXXXXbbb100bb 256 MB
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*
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*/
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sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
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}
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#endif /* CM_SPD_DETECT */
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return 0;
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}
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/* The Integrator/CP timer1 is clocked at 1MHz
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* can be divided by 16 or 256
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* and can be set up as a 32-bit timer
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*/
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/* U-Boot expects a 32 bit timer, running at CONFIG_SYS_HZ */
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/* Keep total timer count to avoid losing decrements < div_timer */
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static unsigned long long total_count = 0;
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static unsigned long long lastdec; /* Timer reading at last call */
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static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
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static unsigned long long div_timer = 1; /* Divisor to convert timer reading
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* change to U-Boot ticks
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*/
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/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */
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static ulong timestamp; /* U-Boot ticks since startup */
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#define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
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#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
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/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec
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* - unless otherwise stated
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*/
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/* starts up a counter
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* - the Integrator/CP timer can be set up to issue an interrupt */
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int interrupt_init (void)
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{
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/* Load timer with initial value */
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*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;
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/* Set timer to be
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* enabled 1
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* periodic 1
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* no interrupts 0
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* X 0
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* divider 1 00 == less rounding error
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* 32 bit 1
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* wrapping 0
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*/
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*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2;
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/* init the timestamp */
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total_count = 0ULL;
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reset_timer_masked();
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div_timer = (unsigned long long)(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ);
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div_timer /= div_clock;
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return (0);
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}
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/*
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* timer without interrupts
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*/
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void reset_timer (void)
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{
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reset_timer_masked ();
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}
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ulong get_timer (ulong base_ticks)
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{
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return get_timer_masked () - base_ticks;
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}
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void set_timer (ulong ticks)
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{
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timestamp = ticks;
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total_count = (unsigned long long)ticks * div_timer;
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}
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/* delay usec useconds */
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void udelay (unsigned long usec)
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{
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ulong tmo, tmp;
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/* Convert to U-Boot ticks */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000000L);
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tmp = get_timer_masked(); /* get current timestamp */
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tmo += tmp; /* form target timestamp */
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while (get_timer_masked () < tmo) {/* loop till event */
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/*NOP*/;
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}
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}
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void reset_timer_masked (void)
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{
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/* capure current decrementer value */
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lastdec = (unsigned long long)READ_TIMER;
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/* start "advancing" time stamp from 0 */
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timestamp = 0L;
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}
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/* converts the timer reading to U-Boot ticks */
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/* the timestamp is the number of ticks since reset */
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ulong get_timer_masked (void)
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{
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/* get current count */
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unsigned long long now = (unsigned long long)READ_TIMER;
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if(now > lastdec) {
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/* Must have wrapped */
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total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
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} else {
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total_count += lastdec - now;
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}
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lastdec = now;
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/* Reuse "now" */
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now = total_count;
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do_div(now, div_timer);
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timestamp = now;
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return timestamp;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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udelay(usec);
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return (unsigned long long)get_timer(0);
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}
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/*
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* Return the timebase clock frequency
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* i.e. how often the timer decrements
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*/
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ulong get_tbclk (void)
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{
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return (ulong)(((unsigned long long)CONFIG_SYS_HZ_CLOCK)/div_clock);
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}
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