upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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277 lines
7.3 KiB
277 lines
7.3 KiB
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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* Kshitij Gupta <Kshitij@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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#if defined(CONFIG_OMAP730)
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#include <./configs/omap730.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int test_boot_mode(void);
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void spin_up_leds(void);
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void flash__init (void);
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void ether__init (void);
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void set_muxconf_regs (void);
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void peripheral_power_enable (void);
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#define FLASH_ON_CS0 1
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#define FLASH_ON_CS3 0
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static inline void delay (unsigned long loops)
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{
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__asm__ volatile ("1:\n"
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"subs %0, %1, #1\n"
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"bne 1b":"=r" (loops):"0" (loops));
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}
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int test_boot_mode(void)
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{
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/* Check for CS0 and CS3 address decode swapping */
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if (*((volatile int *)EMIFS_CONFIG) & 0x00000002)
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return(FLASH_ON_CS3);
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else
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return(FLASH_ON_CS0);
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}
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/* Toggle backup LED indication */
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void toggle_backup_led(void)
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{
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static int backupLEDState = 0; /* Init variable so that the LED will be ON the first time */
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volatile unsigned int *IOConfReg;
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IOConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT);
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if (backupLEDState != 0) {
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*IOConfReg &= (0xFFFFEFFF);
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backupLEDState = 0;
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} else {
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*IOConfReg |= (0x00001000);
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backupLEDState = 1;
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}
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}
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* arch number of OMAP 730 P2 Board - Same as the Innovator! */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x10000100;
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/* Configure MUX settings */
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set_muxconf_regs ();
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peripheral_power_enable ();
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/* Backup LED indication via GPIO_140 -> Red led if MUX correctly setup */
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toggle_backup_led();
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/* Hold GSM in reset until needed */
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*((volatile unsigned short *)M_CTL) &= ~1;
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/*
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* CSx timings, GPIO Mux ... setup
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*/
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/* Flash: CS0 timings setup */
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*((volatile unsigned int *) FLASH_CFG_0) = 0x0000fff3;
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*((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000088;
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/* Ethernet support trough the debug board */
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/* CS1 timings setup */
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*((volatile unsigned int *) FLASH_CFG_1) = 0x0000fff3;
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*((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000000;
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/* this speeds up your boot a quite a bit. However to make it
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* work, you need make sure your kernel startup flush bug is fixed.
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* ... rkw ...
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*/
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icache_enable ();
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flash__init ();
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ether__init ();
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return 0;
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}
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int misc_init_r (void)
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{
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/* currently empty */
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return (0);
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}
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/******************************
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Routine:
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Description:
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******************************/
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void flash__init (void)
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{
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unsigned int regval;
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regval = *((volatile unsigned int *) EMIFS_CONFIG);
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/* Turn off write protection for flash devices. */
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regval = regval | 0x0001;
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*((volatile unsigned int *) EMIFS_CONFIG) = regval;
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}
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/*************************************************************
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Routine:ether__init
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Description: take the Ethernet controller out of reset and wait
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for the EEPROM load to complete.
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*************************************************************/
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void ether__init (void)
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{
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#define LAN_RESET_REGISTER 0x0400001c
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*((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
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do {
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*((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
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udelay (100);
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} while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
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do {
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*((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
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udelay (100);
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} while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
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#define ETH_CONTROL_REG 0x0400030b
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*((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
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udelay (100);
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}
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/******************************
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Routine:
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Description:
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******************************/
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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/******************************************************
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Routine: set_muxconf_regs
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Description: Setting up the configuration Mux registers
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specific to the hardware
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*******************************************************/
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void set_muxconf_regs (void)
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{
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volatile unsigned int *MuxConfReg;
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/* set each registers to its reset value; */
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/*
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* Backup LED Indication
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*/
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/* Configure MUXed pin. Mode 6: GPIO_140 */
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MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF10);
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*MuxConfReg &= (0xFFFFFF1F); /* Clear D_MPU_LPG1 */
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*MuxConfReg |= 0x000000C0; /* Set D_MPU_LPG1 to 0x6 */
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/* Configure GPIO_140 as output */
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MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL);
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*MuxConfReg &= (0xFFFFEFFF); /* Clear direction (output) for GPIO 140 */
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/*
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* Configure GPIOs for battery charge & feedback
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*/
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/* Configure MUXed pin. Mode 6: GPIO_35 */
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MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
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*MuxConfReg &= 0xFFFFFFF1; /* Clear M_CLK_OUT */
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*MuxConfReg |= 0x0000000C; /* Set M_CLK_OUT = 0x6 (GPIOs) */
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/* Configure MUXed pin. Mode 6: GPIO_72,73,74 */
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MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF5);
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*MuxConfReg &= 0xFFFF1FFF; /* Clear D_DDR */
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*MuxConfReg |= 0x0000C000; /* Set D_DDR = 0x6 (GPIOs) */
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MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL);
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*MuxConfReg |= 0x00000100; /* Configure GPIO_72 as input */
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*MuxConfReg &= 0xFFFFFDFF; /* Configure GPIO_73 as output */
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/*
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* Allow battery charge
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*/
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MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT);
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*MuxConfReg &= (0xFFFFFDFF); /* Clear GPIO_73 pin */
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/*
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* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
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* It is used as the Ethernet controller interrupt
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*/
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MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF9);
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*MuxConfReg &= 0x1FFFFFFF;
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}
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/******************************************************
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Routine: peripheral_power_enable
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Description: Enable the power for UART1
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*******************************************************/
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void peripheral_power_enable (void)
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{
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volatile unsigned int *MuxConfReg;
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/* Set up pins used by UART */
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/* Start UART clock (48MHz) */
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MuxConfReg = (volatile unsigned int *) (PERSEUS_PCC_CONF_REG);
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*MuxConfReg &= (0xFFFFFFF7);
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*MuxConfReg |= (0x00000008);
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/* Get the UART pin in mode0 */
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MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
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*MuxConfReg &= (0xFF1FFFFF);
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*MuxConfReg &= (0xF1FFFFFF);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_LAN91C96
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rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
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#endif
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return rc;
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}
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#endif
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