upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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247 lines
7.4 KiB
247 lines
7.4 KiB
/*
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* Copyright (C) ST-Ericsson SA 2009
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _UX500_GPIO_h
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#define _UX500_GPIO_h
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#include <asm/types.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/u8500.h>
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#define GPIO_TOTAL_PINS 268
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#define GPIO_PINS_PER_BLOCK 32
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#define GPIO_BLOCKS_COUNT (GPIO_TOTAL_PINS/GPIO_PINS_PER_BLOCK + 1)
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#define GPIO_BLOCK(pin) (((pin + GPIO_PINS_PER_BLOCK) >> 5) - 1)
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struct gpio_register {
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u32 gpio_dat; /* data register : 0x000 */
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u32 gpio_dats; /* data Set register : 0x004 */
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u32 gpio_datc; /* data Clear register : 0x008 */
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u32 gpio_pdis; /* Pull disable register : 0x00C */
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u32 gpio_dir; /* data direction register : 0x010 */
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u32 gpio_dirs; /* data dir Set register : 0x014 */
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u32 gpio_dirc; /* data dir Clear register : 0x018 */
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u32 gpio_slpm; /* Sleep mode register : 0x01C */
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u32 gpio_afsa; /* AltFun A Select reg : 0x020 */
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u32 gpio_afsb; /* AltFun B Select reg : 0x024 */
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u32 gpio_lowemi;/* low EMI Select reg : 0x028 */
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u32 reserved_1[(0x040 - 0x02C) >> 2]; /*0x028-0x3C Reserved*/
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u32 gpio_rimsc; /* rising edge intr set/clear : 0x040 */
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u32 gpio_fimsc; /* falling edge intr set/clear register : 0x044 */
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u32 gpio_mis; /* masked interrupt status register : 0x048 */
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u32 gpio_ic; /* Interrupt Clear register : 0x04C */
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u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register : 0x050 */
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u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register : 0x054 */
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u32 gpio_wks; /* Wakeup Status register : 0x058 */
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};
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/* Error values returned by functions */
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enum gpio_error {
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GPIO_OK = 0,
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GPIO_UNSUPPORTED_HW = -2,
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GPIO_UNSUPPORTED_FEATURE = -3,
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GPIO_INVALID_PARAMETER = -4,
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GPIO_REQUEST_NOT_APPLICABLE = -5,
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GPIO_REQUEST_PENDING = -6,
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GPIO_NOT_CONFIGURED = -7,
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GPIO_INTERNAL_ERROR = -8,
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GPIO_INTERNAL_EVENT = 1,
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GPIO_REMAINING_EVENT = 2,
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GPIO_NO_MORE_PENDING_EVENT = 3,
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GPIO_INVALID_CLIENT = -25,
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GPIO_INVALID_PIN = -26,
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GPIO_PIN_BUSY = -27,
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GPIO_PIN_NOT_ALLOCATED = -28,
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GPIO_WRONG_CLIENT = -29,
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GPIO_UNSUPPORTED_ALTFUNC = -30,
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};
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/*GPIO DEVICE ID */
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enum gpio_device_id {
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GPIO_DEVICE_ID_0,
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GPIO_DEVICE_ID_1,
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GPIO_DEVICE_ID_2,
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GPIO_DEVICE_ID_3,
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GPIO_DEVICE_ID_INVALID
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};
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/*
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* Alternate Function:
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* refered in altfun_table to pointout particular altfun to be enabled
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* when using GPIO_ALT_FUNCTION A/B/C enable/disable operation
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*/
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enum gpio_alt_function {
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GPIO_ALT_UART_0_MODEM,
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GPIO_ALT_UART_0_NO_MODEM,
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GPIO_ALT_UART_1,
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GPIO_ALT_UART_2,
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GPIO_ALT_I2C_0,
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GPIO_ALT_I2C_1,
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GPIO_ALT_I2C_2,
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GPIO_ALT_I2C_3,
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GPIO_ALT_MSP_0,
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GPIO_ALT_MSP_1,
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GPIO_ALT_MSP_2,
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GPIO_ALT_MSP_3,
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GPIO_ALT_MSP_4,
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GPIO_ALT_MSP_5,
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GPIO_ALT_SSP_0,
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GPIO_ALT_SSP_1,
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GPIO_ALT_MM_CARD0,
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GPIO_ALT_SD_CARD0,
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GPIO_ALT_DMA_0,
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GPIO_ALT_DMA_1,
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GPIO_ALT_HSI0,
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GPIO_ALT_CCIR656_INPUT,
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GPIO_ALT_CCIR656_OUTPUT,
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GPIO_ALT_LCD_PANEL,
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GPIO_ALT_MDIF,
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GPIO_ALT_SDRAM,
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GPIO_ALT_HAMAC_AUDIO_DBG,
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GPIO_ALT_HAMAC_VIDEO_DBG,
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GPIO_ALT_CLOCK_RESET,
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GPIO_ALT_TSP,
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GPIO_ALT_IRDA,
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GPIO_ALT_USB_MINIMUM,
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GPIO_ALT_USB_I2C,
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GPIO_ALT_OWM,
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GPIO_ALT_PWL,
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GPIO_ALT_FSMC,
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GPIO_ALT_COMP_FLASH,
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GPIO_ALT_SRAM_NOR_FLASH,
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GPIO_ALT_FSMC_ADDLINE_0_TO_15,
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GPIO_ALT_SCROLL_KEY,
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GPIO_ALT_MSHC,
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GPIO_ALT_HPI,
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GPIO_ALT_USB_OTG,
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GPIO_ALT_SDIO,
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GPIO_ALT_HSMMC,
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GPIO_ALT_FSMC_ADD_DATA_0_TO_25,
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GPIO_ALT_HSI1,
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GPIO_ALT_NOR,
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GPIO_ALT_NAND,
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GPIO_ALT_KEYPAD,
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GPIO_ALT_VPIP,
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GPIO_ALT_CAM,
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GPIO_ALT_CCP1,
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GPIO_ALT_EMMC,
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GPIO_ALT_POP_EMMC,
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GPIO_ALT_FUNMAX /* Add new alt func before this */
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};
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/* Defines pin assignment(Software mode or Alternate mode) */
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enum gpio_mode {
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GPIO_MODE_LEAVE_UNCHANGED, /* Parameter will be ignored */
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GPIO_MODE_SOFTWARE, /* Pin connected to GPIO (SW controlled) */
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GPIO_ALTF_A, /* Pin connected to altfunc 1 (HW periph 1) */
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GPIO_ALTF_B, /* Pin connected to altfunc 2 (HW periph 2) */
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GPIO_ALTF_C, /* Pin connected to altfunc 3 (HW periph 3) */
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GPIO_ALTF_FIND, /* Pin connected to altfunc 3 (HW periph 3) */
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GPIO_ALTF_DISABLE /* Pin connected to altfunc 3 (HW periph 3) */
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};
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/* Defines GPIO pin direction */
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enum gpio_direction {
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GPIO_DIR_LEAVE_UNCHANGED, /* Parameter will be ignored */
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GPIO_DIR_INPUT, /* GPIO set as input */
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GPIO_DIR_OUTPUT /* GPIO set as output */
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};
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/* Interrupt trigger mode */
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enum gpio_trig {
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GPIO_TRIG_LEAVE_UNCHANGED, /* Parameter will be ignored */
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GPIO_TRIG_DISABLE, /* Trigger no IT */
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GPIO_TRIG_RISING_EDGE, /* Trigger an IT on rising edge */
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GPIO_TRIG_FALLING_EDGE, /* Trigger an IT on falling edge */
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GPIO_TRIG_BOTH_EDGES, /* Trigger an IT on rising and falling edge */
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GPIO_TRIG_HIGH_LEVEL, /* Trigger an IT on high level */
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GPIO_TRIG_LOW_LEVEL /* Trigger an IT on low level */
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};
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/* Configuration parameters for one GPIO pin.*/
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struct gpio_config {
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enum gpio_mode mode;
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enum gpio_direction direction;
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enum gpio_trig trig;
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char *dev_name; /* Who owns the gpio pin */
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};
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/* GPIO pin data*/
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enum gpio_data {
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GPIO_DATA_LOW,
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GPIO_DATA_HIGH
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};
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/* GPIO behaviour in sleep mode */
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enum gpio_sleep_mode {
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GPIO_SLEEP_MODE_LEAVE_UNCHANGED, /* Parameter will be ignored */
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GPIO_SLEEP_MODE_INPUT_DEFAULTVOLT, /* GPIO is an input with pull
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up/down enabled when in sleep
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mode. */
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GPIO_SLEEP_MODE_CONTROLLED_BY_GPIO /* GPIO pin is controlled by
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GPIO IP. So mode, direction
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and data values for GPIO pin
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in sleep mode are determined
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by configuration set to GPIO
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pin before entering to sleep
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mode. */
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};
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/* GPIO ability to wake the system up from sleep mode.*/
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enum gpio_wake {
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GPIO_WAKE_LEAVE_UNCHANGED, /* Parameter will be ignored */
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GPIO_WAKE_DISABLE, /* No wake of system from sleep mode. */
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GPIO_WAKE_LOW_LEVEL, /* Wake the system up on a LOW level. */
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GPIO_WAKE_HIGH_LEVEL, /* Wake the system up on a HIGH level. */
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GPIO_WAKE_RISING_EDGE, /* Wake the system up on a RISING edge. */
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GPIO_WAKE_FALLING_EDGE, /* Wake the system up on a FALLING edge. */
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GPIO_WAKE_BOTH_EDGES /* Wake the system up on both RISE and FALL. */
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};
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/* Configuration parameters for one GPIO pin in sleep mode.*/
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struct gpio_sleep_config {
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enum gpio_sleep_mode sleep_mode;/* GPIO behaviour in sleep mode. */
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enum gpio_wake wake; /* GPIO ability to wake up system. */
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};
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extern int gpio_setpinconfig(int pin_id, struct gpio_config *pin_config);
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extern int gpio_resetpinconfig(int pin_id, char *dev_name);
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extern int gpio_writepin(int pin_id, enum gpio_data value, char *dev_name);
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extern int gpio_readpin(int pin_id, enum gpio_data *value);
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extern int gpio_altfuncenable(enum gpio_alt_function altfunc,
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char *dev_name);
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extern int gpio_altfuncdisable(enum gpio_alt_function altfunc,
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char *dev_name);
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struct gpio_altfun_data {
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u16 altfun;
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u16 start;
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u16 end;
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u16 cont;
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u8 type;
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};
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#endif
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