upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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295 lines
8.2 KiB
295 lines
8.2 KiB
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Tegra20 high-level function multiplexing */
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#include <common.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/funcmux.h>
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#include <asm/arch/pinmux.h>
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/*
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* The PINMUX macro is used to set up pinmux tables.
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*/
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#define PINMUX(grp, mux, pupd, tri) \
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{PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
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static const struct pingroup_config disp1_default[] = {
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PINMUX(LDI, DISPA, NORMAL, NORMAL),
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PINMUX(LHP0, DISPA, NORMAL, NORMAL),
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PINMUX(LHP1, DISPA, NORMAL, NORMAL),
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PINMUX(LHP2, DISPA, NORMAL, NORMAL),
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PINMUX(LHS, DISPA, NORMAL, NORMAL),
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PINMUX(LM0, RSVD4, NORMAL, NORMAL),
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PINMUX(LPP, DISPA, NORMAL, NORMAL),
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PINMUX(LPW0, DISPA, NORMAL, NORMAL),
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PINMUX(LPW2, DISPA, NORMAL, NORMAL),
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PINMUX(LSC0, DISPA, NORMAL, NORMAL),
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PINMUX(LSPI, DISPA, NORMAL, NORMAL),
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PINMUX(LVP1, DISPA, NORMAL, NORMAL),
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PINMUX(LVS, DISPA, NORMAL, NORMAL),
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PINMUX(SLXD, SPDIF, NORMAL, NORMAL),
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};
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int funcmux_select(enum periph_id id, int config)
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{
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int bad_config = config != FUNCMUX_DEFAULT;
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switch (id) {
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case PERIPH_ID_UART1:
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switch (config) {
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case FUNCMUX_UART1_IRRX_IRTX:
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pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
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pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
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pinmux_tristate_disable(PINGRP_IRRX);
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pinmux_tristate_disable(PINGRP_IRTX);
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break;
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case FUNCMUX_UART1_UAA_UAB:
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pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
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pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
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pinmux_tristate_disable(PINGRP_UAA);
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pinmux_tristate_disable(PINGRP_UAB);
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bad_config = 0;
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break;
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case FUNCMUX_UART1_GPU:
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pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA);
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pinmux_tristate_disable(PINGRP_GPU);
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bad_config = 0;
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break;
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case FUNCMUX_UART1_SDIO1:
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pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA);
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pinmux_tristate_disable(PINGRP_SDIO1);
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bad_config = 0;
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break;
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}
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if (!bad_config) {
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/*
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* Tegra appears to boot with function UARTA pre-
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* selected on mux group SDB. If two mux groups are
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* both set to the same function, it's unclear which
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* group's pins drive the RX signals into the HW.
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* For UARTA, SDB certainly overrides group IRTX in
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* practice. To solve this, configure some alternative
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* function on SDB to avoid the conflict. Also, tri-
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* state the group to avoid driving any signal onto it
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* until we know what's connected.
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*/
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pinmux_tristate_enable(PINGRP_SDB);
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pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
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}
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break;
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case PERIPH_ID_UART2:
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if (config == FUNCMUX_UART2_UAD) {
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pinmux_set_func(PINGRP_UAD, PMUX_FUNC_UARTB);
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pinmux_tristate_disable(PINGRP_UAD);
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}
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break;
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case PERIPH_ID_UART4:
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if (config == FUNCMUX_UART4_GMC) {
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pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
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pinmux_tristate_disable(PINGRP_GMC);
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}
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break;
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case PERIPH_ID_DVC_I2C:
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/* there is only one selection, pinmux_config is ignored */
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if (config == FUNCMUX_DVC_I2CP) {
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pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C);
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pinmux_tristate_disable(PINGRP_I2CP);
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}
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break;
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case PERIPH_ID_I2C1:
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/* support pinmux_config of 0 for now, */
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if (config == FUNCMUX_I2C1_RM) {
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pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C);
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pinmux_tristate_disable(PINGRP_RM);
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}
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break;
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case PERIPH_ID_I2C2: /* I2C2 */
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switch (config) {
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case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */
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pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2);
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/* PTA to HDMI */
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pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI);
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pinmux_tristate_disable(PINGRP_DDC);
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break;
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case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */
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pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2);
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/* set DDC_SEL to RSVDx (RSVD2 works for now) */
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pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2);
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pinmux_tristate_disable(PINGRP_PTA);
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bad_config = 0;
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break;
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}
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break;
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case PERIPH_ID_I2C3: /* I2C3 */
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/* support pinmux_config of 0 for now */
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if (config == FUNCMUX_I2C3_DTF) {
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pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3);
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pinmux_tristate_disable(PINGRP_DTF);
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}
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break;
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case PERIPH_ID_SDMMC1:
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if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) {
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pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
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pinmux_tristate_disable(PINGRP_SDIO1);
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}
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break;
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case PERIPH_ID_SDMMC2:
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if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
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pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
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pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
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pinmux_tristate_disable(PINGRP_DTA);
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pinmux_tristate_disable(PINGRP_DTD);
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}
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break;
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case PERIPH_ID_SDMMC3:
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switch (config) {
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case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
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pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
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pinmux_tristate_disable(PINGRP_SLXA);
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pinmux_tristate_disable(PINGRP_SLXC);
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pinmux_tristate_disable(PINGRP_SLXD);
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pinmux_tristate_disable(PINGRP_SLXK);
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/* fall through */
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case FUNCMUX_SDMMC3_SDB_4BIT:
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pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
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pinmux_tristate_disable(PINGRP_SDB);
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pinmux_tristate_disable(PINGRP_SDC);
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pinmux_tristate_disable(PINGRP_SDD);
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bad_config = 0;
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break;
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}
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break;
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case PERIPH_ID_SDMMC4:
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switch (config) {
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case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
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pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
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pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
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pinmux_tristate_disable(PINGRP_ATC);
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pinmux_tristate_disable(PINGRP_ATD);
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break;
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case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
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pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
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pinmux_tristate_disable(PINGRP_GME);
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/* fall through */
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case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
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pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
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pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
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pinmux_tristate_disable(PINGRP_ATB);
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pinmux_tristate_disable(PINGRP_GMA);
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bad_config = 0;
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break;
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}
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break;
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case PERIPH_ID_KBC:
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if (config == FUNCMUX_DEFAULT) {
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enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB,
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PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE,
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PINGRP_KBCF};
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int i;
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for (i = 0; i < ARRAY_SIZE(grp); i++) {
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pinmux_tristate_disable(grp[i]);
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pinmux_set_func(grp[i], PMUX_FUNC_KBC);
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pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
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}
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}
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break;
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case PERIPH_ID_USB2:
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if (config == FUNCMUX_USB2_ULPI) {
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pinmux_set_func(PINGRP_UAA, PMUX_FUNC_ULPI);
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pinmux_set_func(PINGRP_UAB, PMUX_FUNC_ULPI);
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pinmux_set_func(PINGRP_UDA, PMUX_FUNC_ULPI);
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pinmux_tristate_disable(PINGRP_UAA);
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pinmux_tristate_disable(PINGRP_UAB);
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pinmux_tristate_disable(PINGRP_UDA);
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}
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break;
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case PERIPH_ID_SPI1:
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if (config == FUNCMUX_SPI1_GMC_GMD) {
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pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
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pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH);
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pinmux_tristate_disable(PINGRP_GMC);
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pinmux_tristate_disable(PINGRP_GMD);
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}
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break;
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case PERIPH_ID_NDFLASH:
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switch (config) {
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case FUNCMUX_NDFLASH_ATC:
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pinmux_set_func(PINGRP_ATC, PMUX_FUNC_NAND);
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pinmux_tristate_disable(PINGRP_ATC);
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break;
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case FUNCMUX_NDFLASH_KBC_8_BIT:
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pinmux_set_func(PINGRP_KBCA, PMUX_FUNC_NAND);
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pinmux_set_func(PINGRP_KBCC, PMUX_FUNC_NAND);
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pinmux_set_func(PINGRP_KBCD, PMUX_FUNC_NAND);
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pinmux_set_func(PINGRP_KBCE, PMUX_FUNC_NAND);
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pinmux_set_func(PINGRP_KBCF, PMUX_FUNC_NAND);
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pinmux_tristate_disable(PINGRP_KBCA);
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pinmux_tristate_disable(PINGRP_KBCC);
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pinmux_tristate_disable(PINGRP_KBCD);
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pinmux_tristate_disable(PINGRP_KBCE);
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pinmux_tristate_disable(PINGRP_KBCF);
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bad_config = 0;
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break;
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}
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break;
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case PERIPH_ID_DISP1:
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if (config == FUNCMUX_DEFAULT) {
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int i;
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for (i = PINGRP_LD0; i <= PINGRP_LD17; i++) {
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pinmux_set_func(i, PMUX_FUNC_DISPA);
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pinmux_tristate_disable(i);
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pinmux_set_pullupdown(i, PMUX_PULL_NORMAL);
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}
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pinmux_config_table(disp1_default,
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ARRAY_SIZE(disp1_default));
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}
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break;
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default:
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debug("%s: invalid periph_id %d", __func__, id);
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return -1;
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}
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if (bad_config) {
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debug("%s: invalid config %d for periph_id %d", __func__,
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config, id);
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return -1;
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}
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return 0;
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}
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