upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.2 KiB
53 lines
1.2 KiB
/*
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* Compatibility functions for pre-driver-model code
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*
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* Copyright (C) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <pci.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include "pci_internal.h"
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#define PCI_HOSE_OP(rw, name, size, type) \
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int pci_hose_##rw##_config_##name(struct pci_controller *hose, \
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pci_dev_t dev, \
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int offset, type value) \
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{ \
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return pci_##rw##_config##size(dev, offset, value); \
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}
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PCI_HOSE_OP(read, byte, 8, u8 *)
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PCI_HOSE_OP(read, word, 16, u16 *)
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PCI_HOSE_OP(read, dword, 32, u32 *)
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PCI_HOSE_OP(write, byte, 8, u8)
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PCI_HOSE_OP(write, word, 16, u16)
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PCI_HOSE_OP(write, dword, 32, u32)
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pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
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{
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struct udevice *dev;
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if (pci_find_device_id(ids, index, &dev))
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return -1;
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return dm_pci_get_bdf(dev);
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}
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struct pci_controller *pci_bus_to_hose(int busnum)
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{
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struct udevice *bus;
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int ret;
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ret = pci_get_bus(busnum, &bus);
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if (ret) {
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debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret);
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return NULL;
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}
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return dev_get_uclass_priv(pci_get_controller(bus));
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}
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