upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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189 lines
5.3 KiB
189 lines
5.3 KiB
/*
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* U-boot - io.h IO routines
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*
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* Copyright (c) 2005-2007 Analog Devices Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef _BLACKFIN_IO_H
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#define _BLACKFIN_IO_H
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#ifdef __KERNEL__
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#include <asm/blackfin.h>
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static inline void sync(void)
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{
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SSYNC();
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}
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/* function prototypes for CF support */
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extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
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extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
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extern unsigned char cf_inb(volatile unsigned char *addr);
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extern void cf_outb(unsigned char val, volatile unsigned char *addr);
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (0)
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#define MAP_WRBACK (0)
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#define MAP_WRTHROUGH (0)
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static inline void *
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map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
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{
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return (void *)paddr;
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}
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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static inline phys_addr_t virt_to_phys(void * vaddr)
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{
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return (phys_addr_t)(vaddr);
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}
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/*
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* These are for ISA/PCI shared memory _only_ and should never be used
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* on any other type of memory, including Zorro memory. They are meant to
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* access the bus in the bus byte order which is little-endian!.
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*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the m68k architecture, we just read/write the
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* memory location directly.
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*/
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#ifndef __ASSEMBLY__
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static inline unsigned char readb(const volatile void *addr)
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{
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unsigned int val;
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int tmp;
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__asm__ __volatile__ ("cli %1;\n\t"
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"NOP; NOP; SSYNC;\n\t"
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"%0 = b [%2] (z);\n\t"
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"sti %1;\n\t"
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: "=d"(val), "=d"(tmp): "a"(addr));
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return (unsigned char) val;
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}
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static inline unsigned short readw(const volatile void *addr)
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{
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unsigned int val;
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int tmp;
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__asm__ __volatile__ ("cli %1;\n\t"
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"NOP; NOP; SSYNC;\n\t"
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"%0 = w [%2] (z);\n\t"
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"sti %1;\n\t"
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: "=d"(val), "=d"(tmp): "a"(addr));
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return (unsigned short) val;
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}
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static inline unsigned int readl(const volatile void *addr)
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{
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unsigned int val;
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int tmp;
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__asm__ __volatile__ ("cli %1;\n\t"
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"NOP; NOP; SSYNC;\n\t"
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"%0 = [%2];\n\t"
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"sti %1;\n\t"
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: "=d"(val), "=d"(tmp): "a"(addr));
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return val;
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}
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#endif /* __ASSEMBLY__ */
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#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
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#define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
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#define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define memset_io(a, b, c) memset((void *)(a), (b), (c))
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#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
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#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
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#define inb(addr) cf_inb((volatile unsigned char *)(addr))
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#define outb(x, addr) cf_outb((unsigned char)(x), (volatile unsigned char *)(addr))
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#define insw(port, addr, count) cf_insw((unsigned short *)addr, (unsigned short *)(port), (count))
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#define outsw(port, addr, count) cf_outsw((unsigned short *)(port), (unsigned short *)addr, (count))
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#define IO_SPACE_LIMIT 0xffff
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/* Values for nocacheflag and cmode */
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#define IOMAP_FULL_CACHING 0
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#define IOMAP_NOCACHE_SER 1
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#define IOMAP_NOCACHE_NONSER 2
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#define IOMAP_WRITETHROUGH 3
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extern void *__ioremap(unsigned long physaddr, unsigned long size,
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int cacheflag);
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extern void __iounmap(void *addr, unsigned long size);
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extern inline void *ioremap(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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extern inline void *ioremap_writethrough(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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}
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extern inline void *ioremap_fullcache(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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}
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extern void iounmap(void *addr);
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extern void blkfin_inv_cache_all(void);
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#define dma_cache_inv(_start, _size) do { blkfin_inv_cache_all(); } while (0)
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#define dma_cache_wback(_start, _size) do { } while (0)
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#define dma_cache_wback_inv(_start, _size) do { blkfin_inv_cache_all(); } while (0)
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#endif
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#endif
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