upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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44 lines
1.3 KiB
44 lines
1.3 KiB
/*
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* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#define PCIREG_8(_adr) (*(volatile unsigned char *)(_adr))
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#define PCIREG_32(_adr) (*(volatile unsigned long *)(_adr))
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#define PCI_PAR PCIREG_32(0xfe0401c0)
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#define PCI_PDR PCIREG_32(0xfe040220)
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#define PCI_CR PCIREG_32(0xfe040100)
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#define PCI_CONF1 PCIREG_32(0xfe040004)
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#define HIGH 1
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#define LOW 0
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#define PCI_PROG 0x80
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#define PCI_EEP_ADDRESS (unsigned short)0x0007
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#define PCI_MAC_ADDRESS_SIZE 3
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#define TIME1 100
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#define TIME2 20000
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#define BIT_DUMMY 0
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#define MAC_EEP_READ 1
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#define MAC_EEP_WRITE 2
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#define MAC_EEP_ERACE 3
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#define MAC_EEP_EWEN 4
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#define MAC_EEP_EWDS 5
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/* RTL8169 */
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const unsigned short EEPROM_W_Data_8169_A[] = {
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0x8129, 0x10ec, 0x8169, 0x1154, 0x032b,
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0x4020, 0xa101
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};
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const unsigned short EEPROM_W_Data_8169_B[] = {
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0x4d15, 0xf7c2, 0x8000, 0x0000, 0x0000, 0x1300,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x2000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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};
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