upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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76 lines
3.2 KiB
76 lines
3.2 KiB
#ifndef __KAREF_H__
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#define __KAREF_H__
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/*
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* (C) Copyright 2005
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* Sandburst Corporation
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* Travis B. Sawyer
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* Ka Reference Design OFEM FPGA Registers & definitions */
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#include "hal_ka_sc_auto.h"
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#include "hal_ka_of_auto.h"
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typedef struct karef_board_id_s {
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const char name[40];
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} KAREF_BOARD_ID_ST, *KAREF_BOARD_ID_PST;
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/* SCAN FPGA */
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typedef struct karef_fpga_regs_s
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{
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volatile unsigned long revision_ul; /* Read Only */
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volatile unsigned long reset_ul; /* Read/Write */
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volatile unsigned long interrupt_ul; /* Read Only */
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volatile unsigned long mask_ul; /* Read/Write */
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volatile unsigned long scratch_ul; /* Read/Write */
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volatile unsigned long scrmask_ul; /* Read/Write */
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volatile unsigned long status_ul; /* Read Only */
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volatile unsigned long control_ul; /* Read/Write */
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volatile unsigned long boardinfo_ul; /* Read Only */
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volatile unsigned long scan_from0_ul; /* Read Only */
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volatile unsigned long scan_from1_ul; /* Read Only */
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volatile unsigned long scan_to0_ul; /* Read/Write */
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volatile unsigned long scan_to1_ul; /* Read/Write */
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volatile unsigned long scan_control_ul; /* Read/Write */
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volatile unsigned long pll_control_ul; /* Read/Write */
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volatile unsigned long core_clock_cnt_ul; /* Read/Write */
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volatile unsigned long dr_clock_cnt_ul; /* Read/Write */
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volatile unsigned long spi_clock_cnt_ul; /* Read/Write */
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volatile unsigned long brdout_data_ul; /* Read/Write */
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volatile unsigned long brdout_enable_ul; /* Read/Write */
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volatile unsigned long brdin_data_ul; /* Read Only */
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volatile unsigned long misc_ul; /* Read/Write */
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} __attribute__((packed)) KAREF_FPGA_REGS_ST , * KAREF_FPGA_REGS_PST;
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/* OFEM FPGA */
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typedef struct ofem_fpga_regs_s
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{
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volatile unsigned long revision_ul; /* Read Only */
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volatile unsigned long reset_ul; /* Read/Write */
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volatile unsigned long interrupt_ul; /* Read Only */
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volatile unsigned long mask_ul; /* Read/Write */
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volatile unsigned long scratch_ul; /* Read/Write */
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volatile unsigned long scrmask_ul; /* Read/Write */
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volatile unsigned long control_ul; /* Read/Write */
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volatile unsigned long mac_flow_ctrl_ul; /* Read/Write */
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} __attribute__((packed)) OFEM_FPGA_REGS_ST , * OFEM_FPGA_REGS_PST;
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#endif /* __KAREF_H__ */
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