upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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190 lines
5.3 KiB
190 lines
5.3 KiB
/*
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* Copyright (C) 2011 Samsung Electronics
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* Lukasz Majewski <l.majewski@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __MAX8997_PMIC_H_
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#define __MAX8997_PMIC_H_
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/* MAX 8997 registers */
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enum {
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MAX8997_REG_PMIC_ID0 = 0x00,
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MAX8997_REG_PMIC_ID1 = 0x01,
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MAX8997_REG_INTSRC = 0x02,
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MAX8997_REG_INT1 = 0x03,
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MAX8997_REG_INT2 = 0x04,
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MAX8997_REG_INT3 = 0x05,
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MAX8997_REG_INT4 = 0x06,
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MAX8997_REG_INT1MSK = 0x08,
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MAX8997_REG_INT2MSK = 0x09,
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MAX8997_REG_INT3MSK = 0x0a,
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MAX8997_REG_INT4MSK = 0x0b,
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MAX8997_REG_STATUS1 = 0x0d,
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MAX8997_REG_STATUS2 = 0x0e,
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MAX8997_REG_STATUS3 = 0x0f,
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MAX8997_REG_STATUS4 = 0x10,
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MAX8997_REG_MAINCON1 = 0x13,
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MAX8997_REG_MAINCON2 = 0x14,
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MAX8997_REG_BUCKRAMP = 0x15,
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MAX8997_REG_BUCK1CTRL = 0x18,
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MAX8997_REG_BUCK1DVS1 = 0x19,
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MAX8997_REG_BUCK1DVS2 = 0x1a,
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MAX8997_REG_BUCK1DVS3 = 0x1b,
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MAX8997_REG_BUCK1DVS4 = 0x1c,
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MAX8997_REG_BUCK1DVS5 = 0x1d,
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MAX8997_REG_BUCK1DVS6 = 0x1e,
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MAX8997_REG_BUCK1DVS7 = 0x1f,
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MAX8997_REG_BUCK1DVS8 = 0x20,
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MAX8997_REG_BUCK2CTRL = 0x21,
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MAX8997_REG_BUCK2DVS1 = 0x22,
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MAX8997_REG_BUCK2DVS2 = 0x23,
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MAX8997_REG_BUCK2DVS3 = 0x24,
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MAX8997_REG_BUCK2DVS4 = 0x25,
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MAX8997_REG_BUCK2DVS5 = 0x26,
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MAX8997_REG_BUCK2DVS6 = 0x27,
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MAX8997_REG_BUCK2DVS7 = 0x28,
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MAX8997_REG_BUCK2DVS8 = 0x29,
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MAX8997_REG_BUCK3CTRL = 0x2a,
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MAX8997_REG_BUCK3DVS = 0x2b,
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MAX8997_REG_BUCK4CTRL = 0x2c,
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MAX8997_REG_BUCK4DVS = 0x2d,
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MAX8997_REG_BUCK5CTRL = 0x2e,
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MAX8997_REG_BUCK5DVS1 = 0x2f,
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MAX8997_REG_BUCK5DVS2 = 0x30,
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MAX8997_REG_BUCK5DVS3 = 0x31,
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MAX8997_REG_BUCK5DVS4 = 0x32,
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MAX8997_REG_BUCK5DVS5 = 0x33,
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MAX8997_REG_BUCK5DVS6 = 0x34,
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MAX8997_REG_BUCK5DVS7 = 0x35,
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MAX8997_REG_BUCK5DVS8 = 0x36,
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MAX8997_REG_BUCK6CTRL = 0x37,
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MAX8997_REG_BUCK6BPSKIPCTRL = 0x38,
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MAX8997_REG_BUCK7CTRL = 0x39,
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MAX8997_REG_BUCK7DVS = 0x3a,
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MAX8997_REG_LDO1CTRL = 0x3b,
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MAX8997_REG_LDO2CTRL = 0x3c,
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MAX8997_REG_LDO3CTRL = 0x3d,
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MAX8997_REG_LDO4CTRL = 0x3e,
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MAX8997_REG_LDO5CTRL = 0x3f,
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MAX8997_REG_LDO6CTRL = 0x40,
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MAX8997_REG_LDO7CTRL = 0x41,
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MAX8997_REG_LDO8CTRL = 0x42,
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MAX8997_REG_LDO9CTRL = 0x43,
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MAX8997_REG_LDO10CTRL = 0x44,
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MAX8997_REG_LDO11CTRL = 0x45,
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MAX8997_REG_LDO12CTRL = 0x46,
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MAX8997_REG_LDO13CTRL = 0x47,
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MAX8997_REG_LDO14CTRL = 0x48,
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MAX8997_REG_LDO15CTRL = 0x49,
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MAX8997_REG_LDO16CTRL = 0x4a,
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MAX8997_REG_LDO17CTRL = 0x4b,
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MAX8997_REG_LDO18CTRL = 0x4c,
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MAX8997_REG_LDO21CTRL = 0x4d,
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MAX8997_REG_MBCCTRL1 = 0x50,
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MAX8997_REG_MBCCTRL2 = 0x51,
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MAX8997_REG_MBCCTRL3 = 0x52,
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MAX8997_REG_MBCCTRL4 = 0x53,
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MAX8997_REG_MBCCTRL5 = 0x54,
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MAX8997_REG_MBCCTRL6 = 0x55,
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MAX8997_REG_OTPCGHCVS = 0x56,
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MAX8997_REG_SAFEOUTCTRL = 0x5a,
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MAX8997_REG_LBCNFG1 = 0x5e,
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MAX8997_REG_LBCNFG2 = 0x5f,
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MAX8997_REG_BBCCTRL = 0x60,
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MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */
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MAX8997_REG_FLASH2_CUR = 0x64,
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MAX8997_REG_MOVIE_CUR = 0x65,
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MAX8997_REG_GSMB_CUR = 0x66,
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MAX8997_REG_BOOST_CNTL = 0x67,
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MAX8997_REG_LEN_CNTL = 0x68,
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MAX8997_REG_FLASH_CNTL = 0x69,
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MAX8997_REG_WDT_CNTL = 0x6a,
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MAX8997_REG_MAXFLASH1 = 0x6b,
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MAX8997_REG_MAXFLASH2 = 0x6c,
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MAX8997_REG_FLASHSTATUS = 0x6d,
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MAX8997_REG_FLASHSTATUSMASK = 0x6e,
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MAX8997_REG_GPIOCNTL1 = 0x70,
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MAX8997_REG_GPIOCNTL2 = 0x71,
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MAX8997_REG_GPIOCNTL3 = 0x72,
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MAX8997_REG_GPIOCNTL4 = 0x73,
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MAX8997_REG_GPIOCNTL5 = 0x74,
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MAX8997_REG_GPIOCNTL6 = 0x75,
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MAX8997_REG_GPIOCNTL7 = 0x76,
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MAX8997_REG_GPIOCNTL8 = 0x77,
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MAX8997_REG_GPIOCNTL9 = 0x78,
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MAX8997_REG_GPIOCNTL10 = 0x79,
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MAX8997_REG_GPIOCNTL11 = 0x7a,
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MAX8997_REG_GPIOCNTL12 = 0x7b,
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MAX8997_REG_LDO1CONFIG = 0x80,
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MAX8997_REG_LDO2CONFIG = 0x81,
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MAX8997_REG_LDO3CONFIG = 0x82,
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MAX8997_REG_LDO4CONFIG = 0x83,
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MAX8997_REG_LDO5CONFIG = 0x84,
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MAX8997_REG_LDO6CONFIG = 0x85,
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MAX8997_REG_LDO7CONFIG = 0x86,
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MAX8997_REG_LDO8CONFIG = 0x87,
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MAX8997_REG_LDO9CONFIG = 0x88,
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MAX8997_REG_LDO10CONFIG = 0x89,
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MAX8997_REG_LDO11CONFIG = 0x8a,
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MAX8997_REG_LDO12CONFIG = 0x8b,
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MAX8997_REG_LDO13CONFIG = 0x8c,
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MAX8997_REG_LDO14CONFIG = 0x8d,
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MAX8997_REG_LDO15CONFIG = 0x8e,
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MAX8997_REG_LDO16CONFIG = 0x8f,
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MAX8997_REG_LDO17CONFIG = 0x90,
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MAX8997_REG_LDO18CONFIG = 0x91,
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MAX8997_REG_LDO21CONFIG = 0x92,
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MAX8997_REG_DVSOKTIMER1 = 0x97,
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MAX8997_REG_DVSOKTIMER2 = 0x98,
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MAX8997_REG_DVSOKTIMER4 = 0x99,
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MAX8997_REG_DVSOKTIMER5 = 0x9a,
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PMIC_NUM_OF_REGS = 0x9b,
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};
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#define ENSAFEOUT1 (1 << 6)
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#define ENSAFEOUT2 (1 << 7)
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#define MAX8997_I2C_ADDR (0xCC >> 1)
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#define MAX8997_RTC_ADDR (0x0C >> 1)
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#define MAX8997_MUIC_ADDR (0x4A >> 1)
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#define MAX8997_FG_ADDR (0x6C >> 1)
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enum {
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LDO_OFF = 0,
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LDO_ON = 1,
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DIS_LDO = (0x00 << 6),
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EN_LDO = (0x3 << 6),
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};
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#endif /* __MAX8997_PMIC_H_ */
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