upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Lokesh Vutla 97405d843e ARM: DRA7xx: clocks: Update PLL values ... Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>		12 years ago
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cpu	ARM: DRA7xx: clocks: Update PLL values	12 years ago
dts	EXYNOS5: Add device node for DP	12 years ago
imx-common	arm: vf610: Add IOMUX support for Vybrid VF610	12 years ago
include/asm	ARM: DRA7xx: clocks: Update PLL values	12 years ago
lib	arm: factorize relocate_code routine	12 years ago
config.mk	arm: Enable -ffunction-sections / -fdata-sections / --gc-sections	12 years ago