upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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77 lines
2.1 KiB
77 lines
2.1 KiB
/*
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* Copyright 2007 Freescale Semiconductor.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include "bcsr.h"
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void enable_8568mds_duart(void)
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{
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volatile uint* duart_mux = (uint *)(CONFIG_SYS_CCSRBAR + 0xe0060);
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volatile uint* devices = (uint *)(CONFIG_SYS_CCSRBAR + 0xe0070);
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volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
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*duart_mux = 0x80000000; /* Set the mux to Duart on PMUXCR */
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*devices = 0; /* Enable all peripheral devices */
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bcsr[5] |= 0x01; /* Enable Duart in BCSR*/
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}
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void enable_8568mds_flash_write(void)
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{
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volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
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bcsr[9] |= 0x01;
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}
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void disable_8568mds_flash_write(void)
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{
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volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
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bcsr[9] &= ~(0x01);
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}
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void enable_8568mds_qe_mdio(void)
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{
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u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
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bcsr[7] |= 0x01;
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}
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#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2)
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void reset_8568mds_uccs(void)
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{
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volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
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/* Turn off UCC1 & UCC2 */
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out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN);
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out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN);
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/* Mode is RGMII, all bits clear */
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out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK |
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BCSR_UCC2_MODE_MSK));
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/* Turn UCC1 & UCC2 on */
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out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN);
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out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN);
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}
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#endif
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