upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
36 lines
1.4 KiB
36 lines
1.4 KiB
/*
|
|
* (C) Copyright 2008
|
|
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
|
|
* This work has been supported by: QTechnology http://qtec.com/
|
|
* based on xparameters-ml507.h by Xilinx
|
|
*
|
|
* This program is free software: you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation, either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#ifndef XPARAMETER_H
|
|
#define XPARAMETER_H
|
|
|
|
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
|
|
#define XPAR_IIC_EEPROM_BASEADDR 0x81600000
|
|
#define XPAR_INTC_0_BASEADDR 0x81800000
|
|
#define XPAR_SPI_0_BASEADDR 0x83400000
|
|
#define XPAR_UARTLITE_0_BASEADDR 0x84000000
|
|
#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000
|
|
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
|
|
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
|
|
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13
|
|
#define XPAR_UARTLITE_0_BAUDRATE 9600
|
|
#define XPAR_SPI_0_NUM_TRANSFER_BITS 8
|
|
|
|
#endif
|
|
|