upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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210 lines
5.1 KiB
210 lines
5.1 KiB
/*
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* (C) Copyright 2009 DENX Software Engineering
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* Author: John Rigby <jrigby@gmail.com>
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*
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* Based on imx27lite.c:
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* Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
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* And:
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* RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx25.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_SPL_BUILD
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void board_init_f(ulong bootflag)
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{
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/*
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* copy ourselves from where we are running to where we were
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* linked at. Use ulong pointers as all addresses involved
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* are 4-byte-aligned.
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*/
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ulong *start_ptr, *end_ptr, *link_ptr, *run_ptr, *dst;
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asm volatile ("ldr %0, =_start" : "=r"(start_ptr));
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asm volatile ("ldr %0, =_end" : "=r"(end_ptr));
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asm volatile ("ldr %0, =board_init_f" : "=r"(link_ptr));
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asm volatile ("adr %0, board_init_f" : "=r"(run_ptr));
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for (dst = start_ptr; dst < end_ptr; dst++)
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*dst = *(dst+(run_ptr-link_ptr));
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/*
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* branch to nand_boot's link-time address.
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*/
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asm volatile("ldr pc, =nand_boot");
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}
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#endif
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#ifdef CONFIG_FEC_MXC
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define FEC_OUT_PAD_CTRL 0
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#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
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#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)
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void tx25_fec_init(void)
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{
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static const iomux_v3_cfg_t fec_pads[] = {
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MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
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MX25_PAD_FEC_RX_DV__FEC_RX_DV,
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MX25_PAD_FEC_RDATA0__FEC_RDATA0,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
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MX25_PAD_FEC_MDIO__FEC_MDIO,
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MX25_PAD_FEC_RDATA1__FEC_RDATA1,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_D13__GPIO_4_7, 0), /* FEC_RESET_B */
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NEW_PAD_CTRL(MX25_PAD_D11__GPIO_4_9, 0), /* FEC_ENABLE_B */
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};
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static const iomux_v3_cfg_t fec_cfg_pads[] = {
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MX25_PAD_FEC_RDATA0__GPIO_3_10,
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MX25_PAD_FEC_RDATA1__GPIO_3_11,
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MX25_PAD_FEC_RX_DV__GPIO_3_12,
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};
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debug("tx25_fec_init\n");
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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/* drop PHY power and assert reset (low) */
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gpio_direction_output(GPIO_FEC_RESET_B, 0);
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gpio_direction_output(GPIO_FEC_ENABLE_B, 0);
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mdelay(5);
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debug("resetting phy\n");
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/* turn on PHY power leaving reset asserted */
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gpio_set_value(GPIO_FEC_ENABLE_B, 1);
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mdelay(10);
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/*
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* Setup some strapping pins that are latched by the PHY
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* as reset goes high.
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*
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* Set PHY mode to 111
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* mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
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* mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
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* mode2 is tied high so nothing to do
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*
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* Turn on RMII mode
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* RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
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*/
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/*
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* set each mux mode to gpio mode
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*/
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imx_iomux_v3_setup_multiple_pads(fec_cfg_pads,
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ARRAY_SIZE(fec_cfg_pads));
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/*
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* set each to 1 and make each an output
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*/
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gpio_direction_output(IMX_GPIO_NR(3, 10), 1);
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gpio_direction_output(IMX_GPIO_NR(3, 11), 1);
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gpio_direction_output(IMX_GPIO_NR(3, 12), 1);
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mdelay(22); /* this value came from RedBoot */
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/*
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* deassert PHY reset
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*/
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gpio_set_value(GPIO_FEC_RESET_B, 1);
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mdelay(5);
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/*
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* set FEC pins back
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*/
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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}
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#else
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#define tx25_fec_init()
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#endif
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#ifdef CONFIG_MXC_UART
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/*
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* Set up input pins with hysteresis and 100-k pull-ups
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*/
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#define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define UART1_OUT_PAD_CTRL 0
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static void tx25_uart1_init(void)
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{
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static const iomux_v3_cfg_t uart1_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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#else
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#define tx25_uart1_init()
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#endif
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int board_init()
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{
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tx25_uart1_init();
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/* board id for linux */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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tx25_fec_init();
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return 0;
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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#if CONFIG_NR_DRAM_BANKS > 1
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
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PHYS_SDRAM_2_SIZE);
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#else
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#endif
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}
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int checkboard(void)
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{
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printf("KARO TX25\n");
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return 0;
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}
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