upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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43 lines
1003 B
43 lines
1003 B
if TARGET_COREBOOT
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config SYS_BOARD
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default "coreboot"
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config SYS_VENDOR
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default "coreboot"
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config SYS_SOC
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default "coreboot"
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config SYS_TEXT_BASE
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default 0x01110000
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comment "coreboot-specific options"
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config SYS_CONFIG_NAME
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string "Board configuration file"
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default "chromebook_link"
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help
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This option selects the board configuration file in include/configs/
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directory to be used to build U-Boot for coreboot.
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config DEFAULT_DEVICE_TREE
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string "Board Device Tree Source (dts) file"
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default "chromebook_link"
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help
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This option selects the board Device Tree Source (dts) file in
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arch/x86/dts/ directory to be used to build U-Boot for coreboot.
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config SYS_CAR_ADDR
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hex "Board specific Cache-As-RAM (CAR) address"
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default 0x19200000
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help
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This option specifies the board specific Cache-As-RAM (CAR) address.
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config SYS_CAR_SIZE
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hex "Board specific Cache-As-RAM (CAR) size"
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default 0x4000
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help
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This option specifies the board specific Cache-As-RAM (CAR) size.
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endif
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