upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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98 lines
2.4 KiB
98 lines
2.4 KiB
/*
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* (C) Copyright 2007
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_ARCH_CLK_H__
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#define __ASM_ARM_ARCH_CLK_H__
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#include <asm/arch/hardware.h>
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#include <asm/global_data.h>
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static inline unsigned long get_cpu_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->cpu_clk_rate_hz;
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}
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static inline unsigned long get_main_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->main_clk_rate_hz;
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}
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static inline unsigned long get_mck_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->mck_rate_hz;
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}
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static inline unsigned long get_plla_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->plla_rate_hz;
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}
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static inline unsigned long get_pllb_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->pllb_rate_hz;
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}
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static inline u32 get_pllb_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->at91_pllb_usb_init;
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}
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static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
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{
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return get_mck_clk_rate();
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}
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static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
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{
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return get_mck_clk_rate();
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}
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static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
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{
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return get_mck_clk_rate();
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}
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static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
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{
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return get_mck_clk_rate();
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}
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static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
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{
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return get_mck_clk_rate();
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}
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static inline unsigned long get_mci_clk_rate(void)
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{
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return get_mck_clk_rate();
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}
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int at91_clock_init(unsigned long main_clock);
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#endif /* __ASM_ARM_ARCH_CLK_H__ */
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