upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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70 lines
1.3 KiB
70 lines
1.3 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2014
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Basic support for the pwm module on imx6.
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*/
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#include <common.h>
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#include <div64.h>
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#include <pwm.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/io.h>
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#include "pwm-imx-util.h"
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int pwm_init(int pwm_id, int div, int invert)
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{
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struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
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if (!pwm)
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return -1;
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writel(0, &pwm->ir);
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return 0;
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}
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int pwm_config(int pwm_id, int duty_ns, int period_ns)
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{
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struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
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unsigned long period_cycles, duty_cycles, prescale;
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u32 cr;
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if (!pwm)
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return -1;
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pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
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&prescale);
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cr = PWMCR_PRESCALER(prescale) |
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PWMCR_DOZEEN | PWMCR_WAITEN |
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PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;
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writel(cr, &pwm->cr);
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/* set duty cycles */
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writel(duty_cycles, &pwm->sar);
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/* set period cycles */
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writel(period_cycles, &pwm->pr);
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return 0;
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}
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int pwm_enable(int pwm_id)
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{
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struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
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if (!pwm)
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return -1;
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setbits_le32(&pwm->cr, PWMCR_EN);
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return 0;
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}
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void pwm_disable(int pwm_id)
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{
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struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
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if (!pwm)
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return;
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clrbits_le32(&pwm->cr, PWMCR_EN);
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}
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