upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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151 lines
2.9 KiB
151 lines
2.9 KiB
/*
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* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <console.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/pci.h>
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#if defined(CONFIG_CPU_32BIT)
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#define NOCACHE_OFFSET 0x00000000
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#else
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#define NOCACHE_OFFSET 0xa0000000
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#endif
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#define PLD_LEDCR (0x04000008 + NOCACHE_OFFSET)
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#define PLD_SWSR (0x0400000a + NOCACHE_OFFSET)
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#define PLD_VERSR (0x0400000c + NOCACHE_OFFSET)
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#define SM107_DEVICEID (0x13e00060 + NOCACHE_OFFSET)
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static void test_pld(void)
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{
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printf("PLD version = %04x\n", readb(PLD_VERSR));
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}
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static void test_sm107(void)
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{
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printf("SM107 device ID = %04x\n", readl(SM107_DEVICEID));
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}
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static void test_led(void)
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{
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printf("turn on LEDs 3, 5, 7, 9\n");
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writeb(0x55, PLD_LEDCR);
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mdelay(2000);
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printf("turn on LEDs 4, 6, 8, 10\n");
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writeb(0xaa, PLD_LEDCR);
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mdelay(2000);
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writeb(0x00, PLD_LEDCR);
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}
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static void test_dipsw(void)
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{
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printf("Please DIPSW set = B'0101\n");
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while (readb(PLD_SWSR) != 0x05) {
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if (ctrlc())
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return;
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}
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printf("Please DIPSW set = B'1010\n");
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while (readb(PLD_SWSR) != 0x0A) {
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if (ctrlc())
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return;
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}
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printf("DIPSW OK\n");
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}
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static void test_net(void)
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{
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unsigned long data;
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writel(0x80000000, 0xfe0401c0);
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data = readl(0xfe040220);
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if (data == 0x816910ec)
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printf("Ethernet OK\n");
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else
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printf("Ethernet NG, data = %08x\n", (unsigned int)data);
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}
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static void test_sata(void)
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{
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unsigned long data;
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writel(0x80000800, 0xfe0401c0);
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data = readl(0xfe040220);
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if (data == 0x35121095)
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printf("SATA OK\n");
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else
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printf("SATA NG, data = %08x\n", (unsigned int)data);
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}
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static void test_pci(void)
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{
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writel(0x80001800, 0xfe0401c0);
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printf("PCI CN1 ID = %08x\n", readl(0xfe040220));
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writel(0x80001000, 0xfe0401c0);
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printf("PCI CN2 ID = %08x\n", readl(0xfe040220));
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}
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int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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char *cmd;
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if (argc != 2)
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return cmd_usage(cmdtp);
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cmd = argv[1];
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switch (cmd[0]) {
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case 'a': /* all */
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test_pld();
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test_led();
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test_dipsw();
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test_sm107();
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test_net();
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test_sata();
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test_pci();
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break;
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case 'p': /* pld or pci */
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if (cmd[1] == 'l')
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test_pld();
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else
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test_pci();
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break;
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case 'l': /* led */
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test_led();
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break;
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case 'd': /* dipsw */
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test_dipsw();
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break;
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case 's': /* sm107 or sata */
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if (cmd[1] == 'm')
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test_sm107();
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else
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test_sata();
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break;
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case 'n': /* net */
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test_net();
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break;
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default:
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return cmd_usage(cmdtp);
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}
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return 0;
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}
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U_BOOT_CMD(
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hwtest, 2, 1, do_hw_test,
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"hardware test for R0P7785LC0011RL board",
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"\n"
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"hwtest all - test all hardware\n"
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"hwtest pld - output PLD version\n"
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"hwtest led - turn on LEDs\n"
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"hwtest dipsw - test DIP switch\n"
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"hwtest sm107 - output SM107 version\n"
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"hwtest net - check RTL8110 ID\n"
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"hwtest sata - check SiI3512 ID\n"
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"hwtest pci - output PCI slot device ID"
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);
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