upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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66 lines
1017 B
66 lines
1017 B
/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_SERDES_H__
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#define __FSL_SERDES_H__
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#include <config.h>
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#if defined(CONFIG_LS2085A)
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enum srds_prtcl {
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NONE = 0,
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PCIE1,
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PCIE2,
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PCIE3,
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PCIE4,
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SATA1,
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SATA2,
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XAUI1,
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XAUI2,
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XFI1,
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XFI2,
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XFI3,
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XFI4,
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XFI5,
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XFI6,
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XFI7,
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XFI8,
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SGMII1,
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SGMII2,
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SGMII3,
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SGMII4,
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SGMII5,
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SGMII6,
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SGMII7,
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SGMII8,
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SGMII9,
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SGMII10,
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SGMII11,
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SGMII12,
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SGMII13,
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SGMII14,
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SGMII15,
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SGMII16,
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QSGMII_A, /* A indicates MACs 1-4 */
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QSGMII_B, /* B indicates MACs 5-8 */
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QSGMII_C, /* C indicates MACs 9-12 */
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QSGMII_D, /* D indicates MACs 12-16 */
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SERDES_PRCTL_COUNT
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};
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enum srds {
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FSL_SRDS_1 = 0,
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FSL_SRDS_2 = 1,
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};
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#endif
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int is_serdes_configured(enum srds_prtcl device);
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void fsl_serdes_init(void);
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int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
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enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
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int is_serdes_prtcl_valid(int serdes, u32 prtcl);
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#endif /* __FSL_SERDES_H__ */
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